# SS2060SP

**YFW** · MOSFETs · TO-277

SS2060SP from YFW, in a TO-277. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LEFT PIN (A) | passive | Left lead on the pin diagram, connected to the diode side opposite the bottomside heat sink (anode); it carries the 20 A average forward current (IF(AV)) together with the right pin. |
| 2 | RIGHT PIN (A) | passive | Right lead on the pin diagram, connected to the diode side opposite the bottomside heat sink (anode); it carries the 20 A average forward current (IF(AV)) together with the left pin. |
| 3 | HEAT SINK (K) | passive | Bottomside heat sink tab, shown on the diagram as the other terminal of the Schottky diode (cathode); the SS2060SP is rated 60 V VRRM and has 60 °C/W typical thermal resistance RθJA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | YFW |
| Package | TO-277 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum Repetitive Peak Reverse Voltage | VRRM |  |  | 60 | V |  | 1 |
| Maximum RMS voltage | VRMS |  |  | 42 | V |  | 1 |
| Maximum DC Blocking Voltage | VDC |  |  | 60 | V |  | 1 |
| Maximum Average Forward Rectified Current | I(AV) |  |  | 20 | A | TL 100C | 1 |
| Peak Forward Surge Current | IFSM |  |  | 250 | A | 8.3ms single half sine-wave superimposed on rated load | 1 |
| Maximum Instantaneous Forward Voltage | VF |  |  | 0.7 | V | at 20 A | 1 |
| Maximum Instantaneous Reverse Current | IR |  |  | 100 | uA | TA 25C, at rated DC reverse voltage | 1 |
| Maximum Instantaneous Reverse Current | IR |  |  | 10 | mA | TA 125C, at rated DC reverse voltage | 1 |
| Operating Junction Temperature Range | Tj | -55 |  | 150 | C |  | 1 |
| Storage Temperature Range | Tstg | -55 |  | 150 | C |  | 1 |
| Typical Thermal Resistance | RθJA |  | 60 |  | C/W |  | 1 |

## CAD (KiCad official)

- Symbol: `SS2060SP`
- Footprint: `Package_TO_SOT_SMD:TO-277A`
- 3D model: TO-277 (KiCad packages3D, STEP)
- 3D model files: `ss2060sp-etched.step` / `ss2060sp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ss2060sp.step` / `ss2060sp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [YFW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590927233655918592) (3 pp, sha256 `b5845f82b4616fc1`, retrieved 2026-10-15, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ss2060sp-datasheet.pdf)