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SQD50N04-4M5L_GE3

Vishay Intertech · MOSFETs · TO-252

SQD50N04-4M5L_GE3 from Vishay Intertech, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the N-channel MOSFET, with a gate-source voltage rating of ±20 V and a threshold of 1.5 V to 2.5 V at ID = 250 μA.
2 D passive Drain, connected to the tab, rated for VDS of 40 V and continuous drain current of 50 A (package limited).
3 S passive Source of the N-channel MOSFET, with a continuous source (diode conduction) current rating of 50 A.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TO-252
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage VDS 40 V VGS = 0 V, ID = 250 μA 2
Gate-Source Threshold Voltage VGS(th) 1.5 2.5 V VDS = VGS, ID = 250 μA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 μA VGS = 0 V, VDS = 40 V 2
Zero Gate Voltage Drain Current IDSS 50 μA VGS = 0 V, VDS = 40 V, TJ = 125 °C 2
Zero Gate Voltage Drain Current IDSS 150 μA VGS = 0 V, VDS = 40 V, TJ = 175 °C 2
On-State Drain Current ID(on) 50 A VGS = 10 V, VDS ≥ 5 V 2
Drain-Source On-State Resistance RDS(on) 0.003 0.0035 Ω VGS = 10 V, ID = 20 A 2
Drain-Source On-State Resistance RDS(on) 0.0056 Ω VGS = 10 V, ID = 20 A, TJ = 125 °C 2
Drain-Source On-State Resistance RDS(on) 0.0068 Ω VGS = 10 V, ID = 20 A, TJ = 175 °C 2
Drain-Source On-State Resistance RDS(on) 0.0035 0.0042 Ω VGS = 4.5 V, ID = 20 A 2
Input Capacitance Ciss 4880 5860 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Output Capacitance Coss 560 670 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Reverse Transfer Capacitance Crss 250 300 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Total Gate Charge Qg 85 130 nC VGS = 10 V, VDS = 20 V, ID = 50 A 2
Gate Resistance Rg 1 2 3 Ω f = 1 MHz 2
Turn-On Delay Time td(on) 9 11 ns VDD = 20 V, RL = 0.4 Ω, ID ≅ 50 A, VGEN = 10 V, Rg = 1 Ω 2
Rise Time tr 11 14 ns VDD = 20 V, RL = 0.4 Ω, ID ≅ 50 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 39 47 ns VDD = 20 V, RL = 0.4 Ω, ID ≅ 50 A, VGEN = 10 V, Rg = 1 Ω 2
Fall Time tf 11 14 ns VDD = 20 V, RL = 0.4 Ω, ID ≅ 50 A, VGEN = 10 V, Rg = 1 Ω 2
Pulsed Source Current ISM 200 A 2
Forward Voltage VSD 0.9 1.5 V IF = 30 A, VGS = 0 V 2
Forward Transconductance gfs 105 S VDS = 15 V, ID = 15 A 2
Gate-Source Charge Qgs 14 nC VGS = 10 V, VDS = 20 V, ID = 50 A 2
Gate-Drain Charge Qgd 14 nC VGS = 10 V, VDS = 20 V, ID = 50 A 2
Drain-Source Voltage VDS 40 V TC = 25 °C 1
Gate-Source Voltage VGS -20 20 V TC = 25 °C 1
Continuous Drain Current ID 50 A TC = 25 °C 1
Continuous Source Current (Diode Conduction) IS 50 A TC = 25 °C 1
Pulsed Drain Current IDM 200 A TC = 25 °C 1
Single Pulse Avalanche Current IAS 55 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 151 mJ L = 0.1 mH 1
Maximum Power Dissipation PD 136 W TC = 25 °C 1
Maximum Power Dissipation PD 45 W TC = 125 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 °C 1
Junction-to-Ambient Thermal Resistance RthJA 50 °C/W PCB mount 1
Junction-to-Case (Drain) Thermal Resistance RthJC 1.1 °C/W 1

CAD (KiCad official)

  • Symbol: SQD50N04-4M5L_GE3
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: sqd50n04-4m5l-ge3-etched.step / sqd50n04-4m5l-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sqd50n04-4m5l-ge3.step / sqd50n04-4m5l-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 8443c93d215f60e9, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF