component

SQD40061EL_GE3

Public Made by Adom

by adom

Vishay Intertech MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistorsqd40061el_ge3factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SQD40061EL_GE3

Vishay Intertech · MOSFETs · TO-252

SQD40061EL_GE3 from Vishay Intertech, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the P-channel MOSFET, with a maximum gate-source voltage of ±20 V and a threshold of -1.5 V to -2.5 V at ID = -250 μA.
2 D passive Drain, connected internally to the tab, rated for VDS of -40 V and continuous ID of -100 A (package limited) at TC = 25 °C.
3 S passive Source of the P-channel MOSFET, with continuous body-diode source current of -97 A and pulsed drain current up to -300 A.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TO-252
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS -40 V TC = 25 °C 1
Gate-source voltage VGS -20 20 V TC = 25 °C 1
Continuous drain current ID -100 A TC = 25 °C, package limited 1
Continuous drain current ID -60 A TC = 125 °C 1
Continuous source current (diode conduction) IS -97 A package limited 1
Pulsed drain current IDM -300 A 1
Single pulse avalanche current IAS -41 A L = 0.1 mH 1
Single pulse avalanche energy EAS 84 mJ L = 0.1 mH 1
Maximum power dissipation PD 107 W TC = 25 °C 1
Maximum power dissipation PD 35 W TC = 125 °C 1
Operating junction and storage temperature range TJ, Tstg -55 175 °C 1
Junction-to-ambient thermal resistance RthJA 50 °C/W PCB mount, 1" square PCB (FR4) 1
Junction-to-case (drain) thermal resistance RthJC 1.4 °C/W 1
Drain-source breakdown voltage VDS -40 V VGS = 0 V, ID = -250 μA 2
Gate-source threshold voltage VGS(th) -1.5 -2 -2.5 V VDS = VGS, ID = -250 μA 2
Gate-source leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero gate voltage drain current IDSS -1 μA VGS = 0 V, VDS = -40 V 2
Zero gate voltage drain current IDSS -50 μA VGS = 0 V, VDS = -40 V, TJ = 125 °C 2
Zero gate voltage drain current IDSS -250 μA VGS = 0 V, VDS = -40 V, TJ = 175 °C 2
On-state drain current ID(on) -50 A VGS = -10 V, VDS ≤ -5 V 2
Drain-source on-state resistance RDS(on) 0.0042 0.0051 Ω VGS = -10 V, ID = -30 A 2
Drain-source on-state resistance RDS(on) 0.0079 Ω VGS = -10 V, ID = -30 A, TJ = 125 °C 2
Drain-source on-state resistance RDS(on) 0.0094 Ω VGS = -10 V, ID = -30 A, TJ = 175 °C 2
Drain-source on-state resistance RDS(on) 0.0059 0.0071 Ω VGS = -4.5 V, ID = -25 A 2
Input capacitance Ciss 11063 14500 pF VGS = 0 V, VDS = -25 V, f = 1 MHz 2
Output capacitance Coss 847 1100 pF VGS = 0 V, VDS = -25 V, f = 1 MHz 2
Reverse transfer capacitance Crss 757 1000 pF VGS = 0 V, VDS = -25 V, f = 1 MHz 2
Total gate charge Qg 185 280 nC VGS = -10 V, VDS = -20 V, ID = -50 A 2
Gate resistance Rg 1.8 3.6 5.4 Ω f = 1 MHz 2
Turn-on delay time td(on) 15 25 ns VDD = -20 V, RL = 0.4 Ω, ID ≅ -50 A, VGEN = -10 V, Rg = 1 Ω 2
Rise time tr 180 280 ns VDD = -20 V, RL = 0.4 Ω, ID ≅ -50 A, VGEN = -10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 145 220 ns VDD = -20 V, RL = 0.4 Ω, ID ≅ -50 A, VGEN = -10 V, Rg = 1 Ω 2
Fall time tf 160 250 ns VDD = -20 V, RL = 0.4 Ω, ID ≅ -50 A, VGEN = -10 V, Rg = 1 Ω 2
Pulsed current (body diode) ISM -300 A 2
Forward voltage VSD -0.84 -1.5 V IF = -30 A, VGS = 0 V 2
Body diode reverse recovery time trr 59 120 ns IF = -30 A, di/dt = 100 A/μs 2
Body diode reverse recovery charge Qrr 90 180 nC IF = -30 A, di/dt = 100 A/μs 2
Forward transconductance gfs 103 S VDS = -30 V, ID = 15 A 2
Gate-source charge Qgs 25 nC VGS = -10 V, VDS = -20 V, ID = -50 A 2
Gate-drain charge Qgd 30 nC VGS = -10 V, VDS = -20 V, ID = -50 A 2
Reverse recovery fall time ta 32 ns IF = -30 A, di/dt = 100 A/μs 2
Reverse recovery rise time tb 27 ns IF = -30 A, di/dt = 100 A/μs 2
Body diode peak reverse recovery current IRM(REC) -3.4 A IF = -30 A, di/dt = 100 A/μs 2

CAD (KiCad official)

  • Symbol: SQD40061EL_GE3
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: sqd40061el-ge3-etched.step / sqd40061el-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sqd40061el-ge3.step / sqd40061el-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 80912016d50147a9, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF