SQ4961EY-T1_GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	S1	passive	Source of P-channel MOSFET 1, with drain-source voltage rated -60 V and continuous source current (diode conduction) of -3 A.
2	G1	input	Gate of P-channel MOSFET 1, with gate-source voltage rated ±20 V and threshold VGS(th) of -1.5 V min, -2.0 V typ, -2.5 V max at ID = -250 µA.
3	S2	passive	Source of P-channel MOSFET 2, with drain-source voltage rated -60 V and continuous source current (diode conduction) of -3 A.
4	G2	input	Gate of P-channel MOSFET 2, with gate-source voltage rated ±20 V and threshold VGS(th) of -1.5 V min, -2.0 V typ, -2.5 V max at ID = -250 µA.
5	D2	passive	Drain of P-channel MOSFET 2, with continuous drain current of -4.4 A per leg at TC = 25 °C and pulsed drain current of -18 A.
6	D2	passive	Drain of P-channel MOSFET 2 (second drain pin, tied to pin 5), with continuous drain current of -4.4 A per leg at TC = 25 °C and RDS(on) of 0.085 Ω max at VGS = -10 V.
7	D1	passive	Drain of P-channel MOSFET 1, with continuous drain current of -4.4 A per leg at TC = 25 °C and pulsed drain current of -18 A.
8	D1	passive	Drain of P-channel MOSFET 1 (second drain pin, tied to pin 7), with continuous drain current of -4.4 A per leg at TC = 25 °C and RDS(on) of 0.085 Ω max at VGS = -10 V.

Key specifications

Parameter	Value
Manufacturer	Vishay Intertech
Package	SO-8
Category	Triode/MOS Tube/Transistor
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-Source Voltage	VDS			-60	V	TC = 25 °C	1
Gate-Source Voltage	VGS	-20		20	V	TC = 25 °C	1
Continuous Drain Current	ID			-4.4	A	TC = 25 °C	1
Continuous Drain Current	ID			-2.5	A	TC = 125 °C	1
Continuous Source Current (Diode Conduction)	IS			-3	A		1
Pulsed Drain Current	IDM			-18	A		1
Single Pulse Avalanche Current	IAS			-20	A	L = 0.1 mH	1
Single Pulse Avalanche Energy	EAS			20	mJ	L = 0.1 mH	1
Maximum Power Dissipation	PD			3.3	W	TC = 25 °C	1
Maximum Power Dissipation	PD			1.1	W	TC = 125 °C	1
Operating Junction and Storage Temperature Range	TJ, Tstg	-55		175	°C		1
Junction-to-Ambient Thermal Resistance	RthJA			105	°C/W	PCB mount	1
Junction-to-Foot (Drain) Thermal Resistance	RthJF			45	°C/W		1
Drain-Source Breakdown Voltage	VDS	-60			V	VGS = 0 V, ID = - 250 μA	2
Gate-Source Threshold Voltage	VGS(th)	-1.5	-2	-2.5	V	VDS = VGS, ID = - 250 μA	2
Gate-Source Leakage	IGSS			100	nA	VDS = 0 V, VGS = ± 20 V	2
Zero Gate Voltage Drain Current	IDSS			-1	μA	VGS = 0 V, VDS = - 60 V	2
Zero Gate Voltage Drain Current	IDSS			-50	μA	VGS = 0 V, VDS = - 60 V, TJ = 125 °C	2
Zero Gate Voltage Drain Current	IDSS			-150	μA	VGS = 0 V, VDS = - 60 V, TJ = 175 °C	2
On-State Drain Current	ID(on)	-12			A	VGS = - 10 V, VDS ≤ - 5 V	2
Drain-Source On-State Resistance	RDS(on)		0.07	0.085	Ω	VGS = - 10 V, ID = - 3.5 A	2
Drain-Source On-State Resistance	RDS(on)			0.142	Ω	VGS = - 10 V, ID = - 3.5 A, TJ = 125 °C	2
Drain-Source On-State Resistance	RDS(on)			0.176	Ω	VGS = - 10 V, ID = - 3.5 A, TJ = 175 °C	2
Drain-Source On-State Resistance	RDS(on)		0.095	0.115	Ω	VGS = - 4.5 V, ID = - 2.5 A	2
Input Capacitance	Ciss		912	1140	pF	VGS = 0 V, VDS = - 30 V, f = 1 MHz	2
Output Capacitance	Coss		100	125	pF	VGS = 0 V, VDS = - 30 V, f = 1 MHz	2
Reverse Transfer Capacitance	Crss		60	75	pF	VGS = 0 V, VDS = - 30 V, f = 1 MHz	2
Total Gate Charge	Qg		26.5	40	nC	VGS = - 10 V, VDS = - 30 V, ID = - 4.3 A	2
Gate Resistance	Rg	3		16	Ω	f = 1 MHz	2
Turn-On Delay Time	td(on)		11	17	ns	VDD = - 30 V, RL = 8.8 Ω, VGEN = - 10 V, Rg = 1 Ω	2
Rise Time	tr		13	20	ns	VDD = - 30 V, RL = 8.8 Ω, VGEN = - 10 V, Rg = 1 Ω	2
Turn-Off Delay Time	td(off)		36	54	ns	VDD = - 30 V, RL = 8.8 Ω, VGEN = - 10 V, Rg = 1 Ω	2
Fall Time	tf		8	12	ns	VDD = - 30 V, RL = 8.8 Ω, VGEN = - 10 V, Rg = 1 Ω	2
Pulsed Source Current	ISM			-18	A		2
Forward Voltage	VSD		-0.84	-1.2	V	IF = - 3 A, VGS = 0 V	2
Forward Transconductance	gfs		9		S	VDS = - 15 V, ID = - 3.5 A	2
Gate-Source Charge	Qgs		3.8		nC	VGS = - 10 V, VDS = - 30 V, ID = - 4.3 A	2
Gate-Drain Charge	Qgd		5.8		nC	VGS = - 10 V, VDS = - 30 V, ID = - 4.3 A	2

CAD (KiCad official)

Symbol: SQ4961EY-T1_GE3
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)
3D model files: sq4961ey-t1-ge3-etched.step / sq4961ey-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sq4961ey-t1-ge3.step / sq4961ey-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Vishay Intertech datasheet (9 pp, sha256 97172bd948d8f3bc, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

SQ4961EY-T1_GE3

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Schematic Symbol

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