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SQ4483EY-T1_BE3

Vishay Intertech · MOSFETs · SO-8

SQ4483EY-T1_BE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, connected in parallel with pins 2 and 3; continuous source current (diode conduction) is rated -30 A.
2 S passive Source of the P-channel MOSFET, connected in parallel with pins 1 and 3; continuous source current (diode conduction) is rated -30 A.
3 S passive Source of the P-channel MOSFET, connected in parallel with pins 1 and 2; continuous source current (diode conduction) is rated -30 A.
4 G input Gate of the P-channel MOSFET; gate-source voltage is limited to ±20 V, with a threshold of -1.5 to -2.5 V at -250 μA.
5 D passive Drain of the P-channel MOSFET, connected in parallel with pins 6, 7 and 8; drain-source voltage is rated -30 V.
6 D passive Drain of the P-channel MOSFET, connected in parallel with pins 5, 7 and 8; drain-source voltage is rated -30 V.
7 D passive Drain of the P-channel MOSFET, connected in parallel with pins 5, 6 and 8; drain-source voltage is rated -30 V.
8 D passive Drain of the P-channel MOSFET, connected in parallel with pins 5, 6 and 7; drain-source voltage is rated -30 V.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage VDS -30 V VGS = 0 V, ID = -250 μA 2
Gate-source threshold voltage VGS(th) -2.5 -2 -1.5 V VDS = VGS, ID = -250 μA 2
Gate-source leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero gate voltage drain current IDSS -1 μA VGS = 0 V, VDS = -30 V 2
Zero gate voltage drain current IDSS -50 μA VGS = 0 V, VDS = -30 V, TJ = 125 °C 2
Zero gate voltage drain current IDSS -150 μA VGS = 0 V, VDS = -30 V, TJ = 175 °C 2
On-state drain current ID(on) -30 A VGS = -10 V, VDS ≤ -5 V 2
Drain-source on-state resistance RDS(on) 0.007 0.0085 Ω VGS = -10 V, ID = -10 A 2
Drain-source on-state resistance RDS(on) 0.013 Ω VGS = -10 V, ID = -10 A, TJ = 125 °C 2
Drain-source on-state resistance RDS(on) 0.015 Ω VGS = -10 V, ID = -10 A, TJ = 175 °C 2
Drain-source on-state resistance RDS(on) 0.016 0.02 Ω VGS = -4.5 V, ID = -7 A 2
Input capacitance Ciss 3400 4500 pF VGS = 0 V, VDS = -15 V, f = 1 MHz 2
Output capacitance Coss 712 890 pF VGS = 0 V, VDS = -15 V, f = 1 MHz 2
Reverse transfer capacitance Crss 580 770 pF VGS = 0 V, VDS = -15 V, f = 1 MHz 2
Total gate charge Qg 75 113 nC VGS = -10 V, VDS = -15 V, ID = -10 A 2
Gate resistance Rg 1 2 3 Ω f = 1 MHz 2
Turn-on delay time td(on) 20 25 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 2
Rise time tr 146 189 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 57 75 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 2
Fall time tf 20 25 ns VDD = -15 V, RL = 1.5 Ω, ID ≅ -10 A, VGEN = -10 V, Rg = 1 Ω 2
Pulsed source current ISM -84 A 2
Forward voltage VSD -0.75 -1.2 V IF = -3 A, VGS = 0 V 2
Drain-source voltage VDS -30 V TC = 25 °C 1
Gate-source voltage VGS -20 20 V TC = 25 °C 1
Continuous drain current ID -30 A 1
Continuous source current (diode conduction) IS -30 A 1
Pulsed drain current IDM -84 A 1
Single pulse avalanche current IAS -32 A 1
Single pulse avalanche energy EAS 51 mJ 1
Maximum power dissipation PD 7 W 1
Maximum power dissipation PD 2 W 1
Operating junction and storage temperature range TJ, Tstg -55 175 °C 1
Junction-to-ambient thermal resistance RthJA 85 °C/W PCB mount, 1" square PCB (FR4) 1
Junction-to-case (drain) thermal resistance RthJF 21 °C/W 1
Forward transconductance gfs 32 S VDS = -10 V, ID = -10 A 2
Gate-source charge Qgs 9.5 nC VGS = -10 V, VDS = -15 V, ID = -10 A 2
Gate-drain charge Qgd 19 nC VGS = -10 V, VDS = -15 V, ID = -10 A 2

CAD (KiCad official)

  • Symbol: SQ4483EY-T1_BE3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: sq4483ey-t1-be3-etched.step / sq4483ey-t1-be3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sq4483ey-t1-be3.step / sq4483ey-t1-be3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (11 pp, sha256 582e7415149502ed, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF