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SQ4284EY-T1_GE3

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Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SQ4284EY-T1_GE3

Vishay Intertech · MOSFETs · SO-8

SQ4284EY-T1_GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of N-channel MOSFET 1; the MOSFETs are rated for 40 V VDS.
2 G1 input Gate of N-channel MOSFET 1; absolute maximum gate-source voltage is ±20 V.
3 S2 passive Source of N-channel MOSFET 2; continuous source current (diode conduction) is 3.5 A.
4 G2 input Gate of N-channel MOSFET 2; absolute maximum gate-source voltage is ±20 V.
5 D2 passive Drain of N-channel MOSFET 2, tied to pin 6; continuous drain current is 8 A at TC = 25 °C.
6 D2 passive Drain of N-channel MOSFET 2, tied to pin 5; pulsed drain current is 32 A.
7 D1 passive Drain of N-channel MOSFET 1, tied to pin 8; continuous drain current is 8 A at TC = 25 °C.
8 D1 passive Drain of N-channel MOSFET 1, tied to pin 7; pulsed drain current is 32 A.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 40 V TC = 25 °C 1
Gate-source voltage VGS -20 20 V TC = 25 °C 1
Continuous drain current ID 8 A TC = 25 °C 1
Continuous drain current ID 7.4 A TC = 125 °C 1
Continuous source current (diode conduction) IS 3.5 A TC = 25 °C 1
Pulsed drain current IDM 32 A TC = 25 °C 1
Single pulse avalanche current IAS 48 A L = 0.1 mH 1
Single pulse avalanche energy EAS 115 mJ L = 0.1 mH 1
Maximum power dissipation PD 3.9 W TC = 25 °C 1
Maximum power dissipation PD 1.3 W TC = 125 °C 1
Operating junction and storage temperature range TJ, Tstg -55 175 °C 1
Junction-to-ambient thermal resistance RthJA 120 °C/W PCB Mount 1
Junction-to-foot (drain) thermal resistance RthJF 38 °C/W 1
Drain-source breakdown voltage VDS 40 V VGS = 0 V, ID = 250 μA 2
Gate-source threshold voltage VGS(th) 1.5 2 2.5 V VDS = VGS, ID = 250 μA 2
Gate-source leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero gate voltage drain current IDSS 1 μA VGS = 0 V, VDS = 40 V 2
Zero gate voltage drain current IDSS 50 μA VGS = 0 V, VDS = 40 V, TJ = 125 °C 2
Zero gate voltage drain current IDSS 150 μA VGS = 0 V, VDS = 40 V, TJ = 175 °C 2
On-state drain current ID(on) 25 A VGS = 10 V, VDS ≥ 5 V 2
Drain-source on-state resistance RDS(on) 0.0112 0.0135 Ω VGS = 10 V, ID = 7 A 2
Drain-source on-state resistance RDS(on) 0.0198 Ω VGS = 10 V, ID = 7 A, TJ = 125 °C 2
Drain-source on-state resistance RDS(on) 0.0235 Ω VGS = 10 V, ID = 7 A, TJ = 175 °C 2
Drain-source on-state resistance RDS(on) 0.0123 0.0148 Ω VGS = 4.5 V, ID = 5 A 2
Input capacitance Ciss 1760 2200 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Output capacitance Coss 252 315 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Reverse transfer capacitance Crss 93 116 pF VGS = 0 V, VDS = 25 V, f = 1 MHz 2
Total gate charge Qg 30 45 nC VGS = 10 V, VDS = 20 V, ID = 5 A 2
Gate resistance Rg 2.2 4.53 6.8 Ω f = 1 MHz 2
Turn-on delay time td(on) 10 15 ns VDD = 20 V, RL = 4 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω 2
Rise time tr 40 60 ns VDD = 20 V, RL = 4 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 32 48 ns VDD = 20 V, RL = 4 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω 2
Fall time tf 11 17 ns VDD = 20 V, RL = 4 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω 2
Pulsed current ISM 32 A 2
Forward voltage VSD 0.76 1.2 V IF = 7 A, VGS = 0 V 2
Forward transconductance gfs 30 S VDS = 15 V, ID = 7 A 2
Gate-source charge Qgs 5.5 nC VGS = 10 V, VDS = 20 V, ID = 5 A 2
Gate-drain charge Qgd 5 nC VGS = 10 V, VDS = 20 V, ID = 5 A 2

CAD (KiCad official)

  • Symbol: SQ4284EY-T1_GE3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: sq4284ey-t1-ge3-etched.step / sq4284ey-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sq4284ey-t1-ge3.step / sq4284ey-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 746cb771eed86df4, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF