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SQ4153EY-T1_GE3
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Vishay Intertech MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SQ4153EY-T1_GE3
Vishay Intertech · MOSFETs · SOIC-8
SQ4153EY-T1_GE3 from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; the device is rated for VDS of -12 V and continuous source (diode) current of -6.5 A. |
| 2 | S | passive | Source of the P-channel MOSFET; the device is rated for VDS of -12 V and continuous source (diode) current of -6.5 A. |
| 3 | S | passive | Source of the P-channel MOSFET; the device is rated for VDS of -12 V and continuous source (diode) current of -6.5 A. |
| 4 | G | input | Gate of the P-channel MOSFET; maximum gate-source voltage is ±8 V with a threshold of -0.4 V to -0.9 V. |
| 5 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -25 A at TC = 25 °C (package limited) and pulsed drain current is -100 A. |
| 6 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -25 A at TC = 25 °C (package limited) and pulsed drain current is -100 A. |
| 7 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -25 A at TC = 25 °C (package limited) and pulsed drain current is -100 A. |
| 8 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -25 A at TC = 25 °C (package limited) and pulsed drain current is -100 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOIC-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | -12 | V | TC = 25 °C | 1 | ||
| Gate-source voltage | VGS | -8 | 8 | V | TC = 25 °C | 1 | |
| Continuous drain current | ID | -25 | A | TC = 25 °C | 1 | ||
| Continuous drain current | ID | -14 | A | TC = 125 °C | 1 | ||
| Continuous source current (diode conduction) | IS | -6.5 | A | TC = 25 °C | 1 | ||
| Pulsed drain current | IDM | -100 | A | TC = 25 °C | 1 | ||
| Single pulse avalanche current | IAS | -19 | A | L = 0.1 mH | 1 | ||
| Single pulse avalanche energy | EAS | 18 | mJ | L = 0.1 mH | 1 | ||
| Maximum power dissipation | PD | 7.1 | W | TC = 25 °C | 1 | ||
| Maximum power dissipation | PD | 2.3 | W | TC = 125 °C | 1 | ||
| Operating junction and storage temperature range | TJ, Tstg | -55 | 175 | °C | 1 | ||
| Junction-to-ambient PCB mount | RthJA | 85 | °C/W | When mounted on 1" square PCB (FR4 material) | 1 | ||
| Junction-to-foot (drain) | RthJF | 21 | °C/W | 1 | |||
| Drain-source breakdown voltage | VDS | -12 | V | VGS = 0, ID = -250 μA | 2 | ||
| Gate-source threshold voltage | VGS(th) | -0.4 | -0.6 | -0.9 | V | VDS = VGS, ID = -250 μA | 2 |
| Gate-source leakage | IGSS | 100 | nA | VDS = 0 V, VGS = ± 8 V | 2 | ||
| Zero gate voltage drain current | IDSS | -1 | μA | VGS = 0 V, VDS = -12 V | 2 | ||
| Zero gate voltage drain current | IDSS | -50 | μA | VGS = 0 V, VDS = -12 V, TJ = 125 °C | 2 | ||
| Zero gate voltage drain current | IDSS | -150 | μA | VGS = 0 V, VDS = -12 V, TJ = 175 °C | 2 | ||
| On-state drain current | ID(on) | -30 | A | VGS = -4.5 V, VDS ≥ -5 V | 2 | ||
| Drain-source on-state resistance | RDS(on) | 0.0051 | 0.00832 | Ω | VGS = -4.5 V, ID = -14 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.009 | Ω | VGS = -4.5 V, ID = -14 A, TJ = 125 °C | 2 | ||
| Drain-source on-state resistance | RDS(on) | 0.011 | Ω | VGS = -4.5 V, ID = -14 A, TJ = 175 °C | 2 | ||
| Drain-source on-state resistance | RDS(on) | 0.0065 | 0.01 | Ω | VGS = -2.5 V, ID = -13 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.0094 | 0.0143 | Ω | VGS = -1.8 V, ID = -12 A | 2 | |
| Input capacitance | Ciss | 7500 | 11000 | pF | VGS = 0 V, VDS = -6 V, f = 1 MHz | 2 | |
| Output capacitance | Coss | 2800 | 4200 | pF | VGS = 0 V, VDS = -6 V, f = 1 MHz | 2 | |
| Reverse transfer capacitance | Crss | 2400 | 3600 | pF | VGS = 0 V, VDS = -6 V, f = 1 MHz | 2 | |
| Total gate charge | Qg | 101 | 151 | nC | VGS = -4.5 V, VDS = -6 V, ID = -10.5 A | 2 | |
| Gate resistance | Rg | 1.1 | 2.2 | 3.2 | Ω | f = 1 MHz | 2 |
| Turn-on delay time | td(on) | 31 | 42 | ns | VDD = -6 V, RL = 15 Ω, ID ≅ -10.5 A, VGEN = -4.5 V, Rg = 6 Ω | 2 | |
| Rise time | tr | 168 | 224 | ns | VDD = -6 V, RL = 15 Ω, ID ≅ -10.5 A, VGEN = -4.5 V, Rg = 6 Ω | 2 | |
| Turn-off delay time | td(off) | 310 | 412 | ns | VDD = -6 V, RL = 15 Ω, ID ≅ -10.5 A, VGEN = -4.5 V, Rg = 6 Ω | 2 | |
| Fall time | tf | 283 | 376 | ns | VDD = -6 V, RL = 15 Ω, ID ≅ -10.5 A, VGEN = -4.5 V, Rg = 6 Ω | 2 | |
| Pulsed diode current | ISM | -100 | A | 2 | |||
| Forward voltage | VSD | -0.8 | -1.2 | V | IF = -10.5 A, VGS = 0 | 2 | |
| Forward transconductance | gfs | 54 | S | VDS = -6 V, ID = -10.5 A | 2 | ||
| Gate-source charge | Qgs | 15 | nC | VGS = -4.5 V, VDS = -6 V, ID = -10.5 A | 2 | ||
| Gate-drain charge | Qgd | 45 | nC | VGS = -4.5 V, VDS = -6 V, ID = -10.5 A | 2 |
CAD (KiCad official)
- Symbol:
SQ4153EY-T1_GE3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sq4153ey-t1-ge3-etched.step/sq4153ey-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sq4153ey-t1-ge3.step/sq4153ey-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (9 pp, sha256
e293508d46d2f95b, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SQ4153EY-T1_GE3
**Vishay Intertech** · MOSFETs · SOIC-8
SQ4153EY-T1_GE3 from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; the device is rated for VDS of -12 V and continuous source (diode) current of -6.5 A. |
| 2 | S | passive | Source of the P-channel MOSFET; the device is rated for VDS of -12 V and continuous source (diode) current of -6.5 A. |
| 3 | S | passive | Source of the P-channel MOSFET; the device is rated for VDS of -12 V and continuous source (diode) current of -6.5 A. |
| 4 | G | input | Gate of the P-channel MOSFET; maximum gate-source voltage is ±8 V with a threshold of -0.4 V to -0.9 V. |
| 5 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -25 A at TC = 25 °C (package limited) and pulsed drain current is -100 A. |
| 6 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -25 A at TC = 25 °C (package limited) and pulsed drain current is -100 A. |
| 7 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -25 A at TC = 25 °C (package limited) and pulsed drain current is -100 A. |
| 8 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -25 A at TC = 25 °C (package limited) and pulsed drain current is -100 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOIC-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | | | -12 | V | TC = 25 °C | 1 |
| Gate-source voltage | VGS | -8 | | 8 | V | TC = 25 °C | 1 |
| Continuous drain current | ID | | | -25 | A | TC = 25 °C | 1 |
| Continuous drain current | ID | | | -14 | A | TC = 125 °C | 1 |
| Continuous source current (diode conduction) | IS | | | -6.5 | A | TC = 25 °C | 1 |
| Pulsed drain current | IDM | | | -100 | A | TC = 25 °C | 1 |
| Single pulse avalanche current | IAS | | | -19 | A | L = 0.1 mH | 1 |
| Single pulse avalanche energy | EAS | | | 18 | mJ | L = 0.1 mH | 1 |
| Maximum power dissipation | PD | | | 7.1 | W | TC = 25 °C | 1 |
| Maximum power dissipation | PD | | | 2.3 | W | TC = 125 °C | 1 |
| Operating junction and storage temperature range | TJ, Tstg | -55 | | 175 | °C | | 1 |
| Junction-to-ambient PCB mount | RthJA | | | 85 | °C/W | When mounted on 1" square PCB (FR4 material) | 1 |
| Junction-to-foot (drain) | RthJF | | | 21 | °C/W | | 1 |
| Drain-source breakdown voltage | VDS | -12 | | | V | VGS = 0, ID = -250 μA | 2 |
| Gate-source threshold voltage | VGS(th) | -0.4 | -0.6 | -0.9 | V | VDS = VGS, ID = -250 μA | 2 |
| Gate-source leakage | IGSS | | | 100 | nA | VDS = 0 V, VGS = ± 8 V | 2 |
| Zero gate voltage drain current | IDSS | | | -1 | μA | VGS = 0 V, VDS = -12 V | 2 |
| Zero gate voltage drain current | IDSS | | | -50 | μA | VGS = 0 V, VDS = -12 V, TJ = 125 °C | 2 |
| Zero gate voltage drain current | IDSS | | | -150 | μA | VGS = 0 V, VDS = -12 V, TJ = 175 °C | 2 |
| On-state drain current | ID(on) | -30 | | | A | VGS = -4.5 V, VDS ≥ -5 V | 2 |
| Drain-source on-state resistance | RDS(on) | | 0.0051 | 0.00832 | Ω | VGS = -4.5 V, ID = -14 A | 2 |
| Drain-source on-state resistance | RDS(on) | | | 0.009 | Ω | VGS = -4.5 V, ID = -14 A, TJ = 125 °C | 2 |
| Drain-source on-state resistance | RDS(on) | | | 0.011 | Ω | VGS = -4.5 V, ID = -14 A, TJ = 175 °C | 2 |
| Drain-source on-state resistance | RDS(on) | | 0.0065 | 0.01 | Ω | VGS = -2.5 V, ID = -13 A | 2 |
| Drain-source on-state resistance | RDS(on) | | 0.0094 | 0.0143 | Ω | VGS = -1.8 V, ID = -12 A | 2 |
| Input capacitance | Ciss | | 7500 | 11000 | pF | VGS = 0 V, VDS = -6 V, f = 1 MHz | 2 |
| Output capacitance | Coss | | 2800 | 4200 | pF | VGS = 0 V, VDS = -6 V, f = 1 MHz | 2 |
| Reverse transfer capacitance | Crss | | 2400 | 3600 | pF | VGS = 0 V, VDS = -6 V, f = 1 MHz | 2 |
| Total gate charge | Qg | | 101 | 151 | nC | VGS = -4.5 V, VDS = -6 V, ID = -10.5 A | 2 |
| Gate resistance | Rg | 1.1 | 2.2 | 3.2 | Ω | f = 1 MHz | 2 |
| Turn-on delay time | td(on) | | 31 | 42 | ns | VDD = -6 V, RL = 15 Ω, ID ≅ -10.5 A, VGEN = -4.5 V, Rg = 6 Ω | 2 |
| Rise time | tr | | 168 | 224 | ns | VDD = -6 V, RL = 15 Ω, ID ≅ -10.5 A, VGEN = -4.5 V, Rg = 6 Ω | 2 |
| Turn-off delay time | td(off) | | 310 | 412 | ns | VDD = -6 V, RL = 15 Ω, ID ≅ -10.5 A, VGEN = -4.5 V, Rg = 6 Ω | 2 |
| Fall time | tf | | 283 | 376 | ns | VDD = -6 V, RL = 15 Ω, ID ≅ -10.5 A, VGEN = -4.5 V, Rg = 6 Ω | 2 |
| Pulsed diode current | ISM | | | -100 | A | | 2 |
| Forward voltage | VSD | | -0.8 | -1.2 | V | IF = -10.5 A, VGS = 0 | 2 |
| Forward transconductance | gfs | | 54 | | S | VDS = -6 V, ID = -10.5 A | 2 |
| Gate-source charge | Qgs | | 15 | | nC | VGS = -4.5 V, VDS = -6 V, ID = -10.5 A | 2 |
| Gate-drain charge | Qgd | | 45 | | nC | VGS = -4.5 V, VDS = -6 V, ID = -10.5 A | 2 |
## CAD (KiCad official)
- Symbol: `SQ4153EY-T1_GE3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `sq4153ey-t1-ge3-etched.step` / `sq4153ey-t1-ge3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sq4153ey-t1-ge3.step` / `sq4153ey-t1-ge3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vishay Intertech datasheet](docs/sq4153ey-t1-ge3-datasheet.pdf) (9 pp, sha256 `e293508d46d2f95b`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sq4153ey-t1-ge3-datasheet.pdf)