component

SQ3469EV-T1_BE3

Public Made by Adom

by adom

Vishay Intertech MOSFETs, TSOP-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorssq3469ev-t1_be3factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 23d ago
viewers sq3469ev-t1-be3: viewers · Ray 23d ago
package.json Publish 0.1.0 · Ray 23d ago
page.json Set visibility: public · Ray 23d ago
README.md Publish 0.1.0 · Ray 23d ago
sq3469ev-t1-be3-etched.glb Publish 0.1.0 · Ray 23d ago
sq3469ev-t1-be3-etched.step sq3469ev-t1-be3: factory component page (tier=lcsc) · Ray 23d ago
sq3469ev-t1-be3-hero.glb sq3469ev-t1-be3: hero GLB from the etched model (keeps the MPN mark) · Ray 23d ago
sq3469ev-t1-be3-hero.overlay.json Publish 0.1.0 · Ray 23d ago
sq3469ev-t1-be3.glb Publish 0.1.0 · Ray 23d ago
sq3469ev-t1-be3.kicad_mod Publish 0.1.0 · Ray 23d ago
sq3469ev-t1-be3.kicad_sym Publish 0.1.0 · Ray 23d ago
sq3469ev-t1-be3.lbr Publish 0.1.0 · Ray 23d ago
sq3469ev-t1-be3.step Publish 0.1.0 · Ray 23d ago

SQ3469EV-T1_BE3

Vishay Intertech · MOSFETs · TSOP-6

SQ3469EV-T1_BE3 from Vishay Intertech, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain terminal of the P-channel MOSFET; the datasheet rates drain-source voltage VDS at -20 V and continuous drain current at -8 A (TC = 25 °C).
2 D passive Drain terminal of the P-channel MOSFET, internally common with pins 1, 5 and 6; the datasheet rates drain-source voltage VDS at -20 V.
3 G input Gate terminal of the P-channel MOSFET; the datasheet rates gate-source voltage VGS at ±20 V.
4 S passive Source terminal of the P-channel MOSFET; the datasheet rates continuous source current IS at -6 A.
5 D passive Drain terminal of the P-channel MOSFET, internally common with pins 1, 2 and 6; the datasheet rates drain-source voltage VDS at -20 V.
6 D passive Drain terminal of the P-channel MOSFET, internally common with pins 1, 2 and 5; the datasheet rates drain-source voltage VDS at -20 V.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TSOP-6
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS -20 V 1
Gate-source voltage VGS -20 20 V 1
Continuous drain current ID -8 A TC = 25 °C 1
Continuous drain current ID -5 A TC = 125 °C 1
Continuous source current IS -6 A 1
Pulsed drain current IDM -32 A 1
Single pulse avalanche current IAS -17 A L = 0.1 mH 1
Single pulse avalanche energy EAS 14 mJ 1
Maximum power dissipation PD 5 W TC = 25 °C 1
Maximum power dissipation PD 1.6 W TC = 125 °C 1
Operating junction and storage temperature range TJ, Tstg -55 175 °C 1
Junction to ambient RthJA 110 °C/W PCB mount 1
Junction to foot (drain) RthJF 30 °C/W 1
Drain-source breakdown voltage VDS -20 V VGS = 0 V, ID = -250 μA 2
Gate-source threshold voltage VGS(th) -1.5 -2 -2.5 V VDS = VGS, ID = -250 μA 2
Gate-source leakage IGSS -100 100 nA VDS = 0 V, VGS = ±20 V 2
Zero gate voltage drain current IDSS -1 μA VGS = 0 V, VDS = -20 V 2
Zero gate voltage drain current IDSS -50 μA VGS = 0 V, VDS = -20 V, TJ = 125 °C 2
Zero gate voltage drain current IDSS -150 μA VGS = 0 V, VDS = -20 V, TJ = 175 °C 2
On-state drain current ID(on) -10 A VGS = -10 V, VDS ≤ -5 V 2
Drain-source on-state resistance RDS(on) 0.029 0.036 Ω VGS = -10 V, ID = -6.7 A 2
Drain-source on-state resistance RDS(on) 0.052 0.064 Ω VGS = -4.5 V, ID = -2 A 2
Input capacitance Ciss 816 1020 pF VGS = 0 V, VDS = -10 V, f = 1 MHz 2
Output capacitance Coss 294 367 pF VGS = 0 V, VDS = -10 V, f = 1 MHz 2
Reverse transfer capacitance Crss 180 225 pF VGS = 0 V, VDS = -10 V, f = 1 MHz 2
Total gate charge Qg 17.7 27 nC VGS = -10 V, VDS = -10 V, ID = -6.7 A 2
Gate resistance Rg 6.3 12 Ω f = 1 MHz 2
Turn-on delay time td(on) 13 20 ns VDD = -10 V, RL = 10 Ω, ID ≅ -1 A, VGEN = -10 V, Rg = 1 Ω 2
Rise time tr 10 15 ns VDD = -10 V, RL = 10 Ω, ID ≅ -1 A, VGEN = -10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 32 48 ns VDD = -10 V, RL = 10 Ω, ID ≅ -1 A, VGEN = -10 V, Rg = 1 Ω 2
Fall time tf 10 15 ns VDD = -10 V, RL = 10 Ω, ID ≅ -1 A, VGEN = -10 V, Rg = 1 Ω 2
Pulsed current ISM -32 A 2
Forward voltage VSD 0.86 1.2 V IF = -5 A, VGS = 0 V 2

CAD (KiCad official)

  • Symbol: SQ3469EV-T1_BE3
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: sq3469ev-t1-be3-etched.step / sq3469ev-t1-be3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sq3469ev-t1-be3.step / sq3469ev-t1-be3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 25e5e649597cfa1c, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF