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SQ3427AEEV-T1_GE3

Public Made by Adom

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Vishay Intertech MOSFETs, TSOP-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SQ3427AEEV-T1_GE3

Vishay Intertech · MOSFETs · TSOP-6

SQ3427AEEV-T1_GE3 from Vishay Intertech, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain of the P-channel MOSFET, tied internally to pins 2, 5 and 6; rated -60 V VDS with continuous drain current of -5.3 A at TC = 25 °C.
2 D passive Drain of the P-channel MOSFET, tied internally to pins 1, 5 and 6; doubles as the thermal path from the die to the PCB copper per the TSOP-6 mounting guidance.
3 G input Gate of the P-channel MOSFET; gate-source voltage is limited to ±20 V (absolute maximum).
4 S passive Source of the P-channel MOSFET; continuous source (body diode) current is rated at -6.3 A.
5 D passive Drain of the P-channel MOSFET, tied internally to pins 1, 2 and 6; doubles as a thermal connection to the package per the TSOP-6 mounting guidance.
6 D passive Drain of the P-channel MOSFET, tied internally to pins 1, 2 and 5; doubles as a thermal connection to the package per the TSOP-6 mounting guidance.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TSOP-6
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage VDS -60 V VGS = 0, ID = -250 μA 2
Gate-Source Threshold Voltage VGS(th) -1.5 -2 -2.5 V VDS = VGS, ID = -250 μA 2
Gate-Source Leakage IGSS -10 10 mA VDS = 0 V, VGS = ± 20 V 2
Gate-Source Leakage IGSS -2 2 mA VDS = 0 V, VGS = ± 10 V 2
Zero Gate Voltage Drain Current IDSS -1 μA VGS = 0 V, VDS = -60 V 2
Zero Gate Voltage Drain Current IDSS -50 μA VGS = 0 V, VDS = -60 V, TJ = 125 °C 2
Zero Gate Voltage Drain Current IDSS -150 μA VGS = 0 V, VDS = -60 V, TJ = 175 °C 2
On-State Drain Current ID(on) -10 A VGS = -10 V, VDS -5 V 2
Drain-Source On-State Resistance RDS(on) 0.079 0.095 Ω VGS = -10 V, ID = -4.5 A 2
Drain-Source On-State Resistance RDS(on) 0.148 Ω VGS = -10 V, ID = -4.5 A, TJ = 125 °C 2
Drain-Source On-State Resistance RDS(on) 0.178 Ω VGS = -10 V, ID = -4.5 A, TJ = 175 °C 2
Drain-Source On-State Resistance RDS(on) 0.112 0.135 Ω VGS = -4.5 V, ID = -3.5 A 2
Input Capacitance Ciss 700 1000 pF VGS = 0 V, VDS = -30 V, f = 1 MHz 2
Output Capacitance Coss 90 120 pF VGS = 0 V, VDS = -30 V, f = 1 MHz 2
Reverse Transfer Capacitance Crss 50 75 pF VGS = 0 V, VDS = -30 V, f = 1 MHz 2
Total Gate Charge Qg 15.3 22 nC VGS = -10 V, VDS = -30 V, ID = -5 A 2
Gate Resistance Rg 2.7 5.4 8.1 Ω f = 1 MHz 2
Turn-On Delay Time td(on) 8 12 ns VDD = -30 V, RL = 6, ID -5 A, VGEN = -10 V, Rg = 1 2
Rise Time tr 24 35 ns VDD = -30 V, RL = 6, ID -5 A, VGEN = -10 V, Rg = 1 2
Turn-Off Delay Time td(off) 26 38 ns VDD = -30 V, RL = 6, ID -5 A, VGEN = -10 V, Rg = 1 2
Fall Time tf 33 50 ns VDD = -30 V, RL = 6, ID -5 A, VGEN = -10 V, Rg = 1 2
Pulsed Current ISM -21 A 2
Forward Voltage VSD -0.8 -1.2 V IF = -1.6 A, VGS = 0 V 2
Drain-Source Voltage VDS -60 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID -5.3 A TC = 25 °C 1
Continuous Drain Current ID -3 A TC = 125 °C 1
Continuous Source Current (Diode Conduction) IS -6.3 A 1
Pulsed Drain Current IDM -21 A 1
Single Pulse Avalanche Current IAS -21 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 22 mJ 1
Maximum Power Dissipation PD 5 W TC = 25 °C 1
Maximum Power Dissipation PD 1.6 W TC = 125 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 °C 1
Junction-to-Ambient (PCB Mount) RthJA 110 °C/W PCB mount 1
Junction-to-Foot (Drain) RthJF 30 °C/W 1

CAD (KiCad official)

  • Symbol: SQ3427AEEV-T1_GE3
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: sq3427aeev-t1-ge3-etched.step / sq3427aeev-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sq3427aeev-t1-ge3.step / sq3427aeev-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (12 pp, sha256 8f6bce2b4ce5058c, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF