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SPP80P06PHXKSA1

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Infineon Technologies MOSFETs, TO-220-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SPP80P06PHXKSA1

Infineon Technologies · MOSFETs · TO-220-3

SPP80P06PHXKSA1 from Infineon Technologies, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate, with a gate-source voltage limit of ±20 V and a gate threshold VGS(th) of -2.1 to -4 V (-3 V typ) at ID = -5.5 mA.
2 D passive Drain, connected to the mounting tab; rated for VDS = -60 V and continuous drain current ID = -80 A at TC = 25 °C (current limited by bondwire).
3 S passive Source, the reference terminal for the ±20 V gate-source rating and the reverse-diode forward voltage VSD of -1.2 V (typ) to -1.6 V (max) at IF = -80 A.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-220-3
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Continuous drain current ID -80 A TC = 25 °C 1
Continuous drain current ID -64 A TC = 100 °C 1
Pulsed drain current ID puls -320 A TC = 25 °C 1
Avalanche energy, single pulse EAS 823 mJ ID = -80 A, VDD = -25 V, RGS = 25 Ω 1
Avalanche energy, periodic limited by Tjmax EAR 34 periodic limited by Tjmax 1
Reverse diode dv/dt dv/dt 6 kV/µs IS = -80 A, VDS = -48, di/dt = 200 A/µs, Tjmax = 175 °C 1
Gate source voltage VGS -20 20 V 1
Power dissipation Ptot 340 W TC = 25 °C 1
Operating and storage temperature Tj, Tstg -55 175 °C 1
Thermal resistance, junction - case RthJC 0.4 K/W 2
Thermal resistance, junction - ambient, leaded RthJA 62 K/W leaded 2
Thermal resistance, junction - ambient, SMD version RthJA 62 K/W SMD version, device on PCB, @ min. footprint 2
Thermal resistance, junction - ambient, SMD version RthJA 40 K/W SMD version, device on PCB, @ 6 cm2 cooling area 2
Drain-source breakdown voltage V(BR)DSS -60 V VGS = 0 V, ID = -250 µA 2
Gate threshold voltage VGS(th) -2.1 -3 -4 V ID = -5.5 mA, VGS = VDS 2
Zero gate voltage drain current IDSS -0.1 -1 µA VDS = -60 V, VGS = 0 V, Tj = 25 °C 2
Zero gate voltage drain current IDSS -10 -100 µA VDS = -60 V, VGS = 0 V, Tj = 150 °C 2
Gate-source leakage current IGSS -10 -100 nA VGS = -20 V, VDS = 0 V 2
Drain-source on-state resistance RDS(on) 0.021 0.023 Ω VGS = -10 V, ID = -64 A 2
Transconductance gfs 18 36 S VDS ≥ 2IDRDS(on)max, ID = -64 A 3
Input capacitance Ciss 4026 5033 pF VGS = 0 V, VDS = -25 V, f = 1 MHz 3
Output capacitance Coss 1252 1565 pF VGS = 0 V, VDS = -25 V, f = 1 MHz 3
Reverse transfer capacitance Crss 437 546 pF VGS = 0 V, VDS = -25 V, f = 1 MHz 3
Turn-on delay time td(on) 24 36 ns VDD = -30 V, VGS = -10 V, ID = -64 A, RG = 1 Ω 3
Rise time tr 18 27 ns VDD = -30 V, VGS = -10 V, ID = -64 A, RG = 1 Ω 3
Turn-off delay time td(off) 56 84 ns VDD = -30 V, VGS = -10 V, ID = -64 A, RG = 1 Ω 3
Fall time tf 30 45 ns VDD = -30 V, VGS = -10 V, ID = -64 A, RG = 1 Ω 3
Gate to source charge Qgs 27.4 41 nC VDD = -48 V, ID = -80 A 4
Gate to drain charge Qgd 50 75 nC VDD = -48 V, ID = -80 A 4
Gate charge total Qg 115 173 nC VDD = -48 V, ID = -80 A, VGS = 0 to -10 V 4
Inverse diode continuous forward current IS -80 A TC = 25 °C 4
Inverse diode direct current, pulsed ISM -320 A TC = 25 °C 4
Inverse diode forward voltage VSD -1.2 -1.6 V VGS = 0 V, IF = -80 A 4
Reverse recovery time trr 117 175 ns VR = -30 V, IF = IS, diF/dt = 100 A/µs 4
Reverse recovery charge Qrr 420 630 nC VR = -30 V, IF = IS, diF/dt = 100 A/µs 4
Gate plateau voltage V(plateau) -6.2 V VDD = -48 V, ID = -80 A 4

CAD (KiCad official)

  • Symbol: SPP80P06PHXKSA1
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220-3 (KiCad packages3D, STEP)
  • 3D model files: spp80p06phxksa1-etched.step / spp80p06phxksa1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); spp80p06phxksa1.step / spp80p06phxksa1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (11 pp, sha256 12948bfdd99dcecf, retrieved 2026-10-29, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF