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SPP17N80C3XKSA1

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Infineon Technologies MOSFETs, TO-220-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsspp17n80c3xksa1factory-2.0.0extractor-text

Verified SPP17N80C3XKSA1

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier lcsc, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SPP17N80C3XKSA1 · TO-220-3 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 13-page datasheet
  • ✓distributor: lcsc C2997932, digikey SPP17N80C3XKSA1-ND, mouser 726-SPP17N80C3XKSA1
  • ✓family: TO-220-3_Vertical
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-hjwgd4yp/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ spp17n80c3xksa1.kicad_sym✓ spp17n80c3xksa1.kicad_mod✓ spp17n80c3xksa1.step
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

SPP17N80C3XKSA1

Infineon Technologies · MOSFETs · TO-220-3

SPP17N80C3XKSA1 from Infineon Technologies, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate (pin 1), rated for ±20 V gate-source voltage (±30 V AC, f >1 Hz) with a gate threshold voltage of 2.1 to 3.9 V.
2 D passive Drain (pin 2), rated for 800 V drain-source voltage and 17 A continuous drain current at TC = 25 °C (51 A pulsed).
3 S passive Source (pin 3), the power return terminal of the 800 V CoolMOS transistor, carrying up to 17 A continuous.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-220-3
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS 800 V VGS=0V, ID=0.25mA 2
Gate threshold voltage VGS(th) 2.1 3 3.9 V ID=1000µA, VGS=VDS 2
Zero gate voltage drain current IDSS 0.5 25 µA VDS=800V, VGS=0V, Tj=25°C 2
Zero gate voltage drain current IDSS 250 µA VDS=800V, VGS=0V, Tj=150°C 2
Gate-source leakage current IGSS 100 nA VGS=20V, VDS=0V 2
Drain-source on-state resistance RDS(on) 0.25 0.29 Ω VGS=10V, ID=11A, Tj=25°C 2
Drain-source on-state resistance RDS(on) 0.78 Ω VGS=10V, ID=11A, Tj=150°C 2
Turn-off delay time td(off) 72 82 ns VDD=400V, VGS=0/10V, ID=17A, RG=4.7Ω, Tj=125°C 3
Fall time tf 6 9 ns VDD=400V, VGS=0/10V, ID=17A, RG=4.7Ω, Tj=125°C 3
Gate charge total Qg 91 177 nC VDD=640V, ID=17A, VGS=0 to 10V 3
Inverse diode continuous forward current IS 17 A TC=25°C 4
Inverse diode direct current, pulsed ISM 51 A 4
Inverse diode forward voltage VSD 1 1.2 V VGS=0V, IF=IS 4
Continuous drain current ID 17 A TC = 25 °C 1
Continuous drain current ID 11 A TC = 100 °C 1
Pulsed drain current ID puls 51 A tp limited by Tjmax 1
Avalanche energy, single pulse EAS 670 mJ ID=3.4A, VDD=50V 1
Avalanche energy, repetitive EAR 0.5 mJ tAR limited by Tjmax, ID=17A, VDD=50V 1
Avalanche current, repetitive IAR 17 A tAR limited by Tjmax 1
Gate source voltage VGS -20 20 V 1
Gate source voltage AC VGS -30 30 V f >1Hz 1
Power dissipation Ptot 208 W TC = 25°C 1
Operating and storage temperature Tj, Tstg -55 150 °C 1
Drain Source voltage slope dv/dt 50 V/ns VDS = 640 V, ID = 17 A, Tj = 125 °C 2
Thermal resistance, junction - case RthJC 0.6 K/W 2
Thermal resistance, junction - ambient, leaded RthJA 62 K/W 2
Soldering temperature, wavesoldering Tsold 260 °C 1.6 mm (0.063 in.) from case for 10s 2
Drain-Source avalanche breakdown voltage V(BR)DS 870 V VGS=0V, ID=17A 2
Gate input resistance RG 0.7 Ω f=1MHz, open drain 2
Transconductance gfs 15 S VDS≥2IDRDS(on)max, ID=11A 3
Input capacitance Ciss 2320 pF VGS=0V, VDS=25V, f=1MHz 3
Output capacitance Coss 1250 pF VGS=0V, VDS=25V, f=1MHz 3
Reverse transfer capacitance Crss 60 pF VGS=0V, VDS=25V, f=1MHz 3

CAD (KiCad official)

  • Symbol: SPP17N80C3XKSA1
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220-3 (KiCad packages3D, STEP)
  • 3D model files: spp17n80c3xksa1-etched.step / spp17n80c3xksa1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); spp17n80c3xksa1.step / spp17n80c3xksa1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (13 pp, sha256 5045ce7f55e64936, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF