component
SPC570S50E1CEFAR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SPC570S50E1CEFAR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TQFP-64(10x10)
SPC570S50E1CEFAR from STMicroelectronics, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FCCU_F0 | output | Fault Collection Control Unit Flag 0 output signal. |
| 2 | PA[0] | bidirectional | Port A bit 0 general-purpose I/O pin. |
| 3 | PA[3] | bidirectional | Port A bit 3 general-purpose I/O pin. |
| 4 | PA[4] | bidirectional | Port A bit 4 general-purpose I/O pin. |
| 5 | PA[7] | bidirectional | Port A bit 7 general-purpose I/O pin. |
| 6 | PA[8] | bidirectional | Port A bit 8 general-purpose I/O pin. |
| 7 | PA[9] | bidirectional | Port A bit 9 general-purpose I/O pin. |
| 8 | PA[11] | bidirectional | Port A bit 11 general-purpose I/O pin. |
| 9 | PA[12] | bidirectional | Port A bit 12 general-purpose I/O pin. |
| 10 | PA[13] | bidirectional | Port A bit 13 general-purpose I/O pin. |
| 11 | PA[14] | bidirectional | Port A bit 14 general-purpose I/O pin. |
| 12 | VDD_LV | power_in | Low voltage (1.2V) power supply input for core processor and PLL. |
| 13 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 14 | PB[3] | input | Port B bit 3 analog input pin for ADC channel 9. |
| 15 | PB[4] | input | Port B bit 4 analog input pin for ADC channel 8. |
| 16 | PB[5] | input | Port B bit 5 analog input pin for ADC channel 7. |
| 17 | PB[6] | input | Port B bit 6 analog input pin for ADC channel 6. |
| 18 | PB[7] | input | Port B bit 7 analog input pin for ADC channel 5. |
| 19 | VREFH_ADC | power_in | ADC high reference voltage supply input pin, 0V to VDD_HV_ADC_TSENS. |
| 20 | PB[10] | input | Port B bit 10 analog input pin for ADC channel 4. |
| 21 | PB[11] | input | Port B bit 11 analog input pin for ADC channel 3. |
| 22 | PB[14] | input | Port B bit 14 analog input pin for ADC channel 2. |
| 23 | PB[15] | input | Port B bit 15 analog input pin for ADC channel 1. |
| 24 | PC[1] | input | Port C bit 1 analog input pin for ADC channel 0. |
| 25 | VDD_HV_ADC_TSENS | power_in | ADC and temperature sensor power supply input, 3.3V or 5V. |
| 26 | PC[2] | bidirectional | Port C bit 2 general-purpose I/O pin. |
| 27 | PC[3] | bidirectional | Port C bit 3 general-purpose I/O pin. |
| 28 | PC[4] | bidirectional | Port C bit 4 general-purpose I/O pin. |
| 29 | PC[7] | bidirectional | Port C bit 7 general-purpose I/O pin. |
| 30 | PC[8] | bidirectional | Port C bit 8 general-purpose I/O pin. |
| 31 | PC[11] | bidirectional | Port C bit 11 general-purpose I/O pin. |
| 32 | FCCU_F1 | output | Fault Collection Control Unit Flag 1 output signal. |
| 33 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 34 | VDD_LV | power_in | Low voltage (1.2V) power supply input for core processor and PLL. |
| 35 | EXTAL | passive | External crystal oscillator input pin for external crystal or resonator connection. |
| 36 | XTAL | passive | External crystal oscillator output connection pin for external crystal or resonator. |
| 37 | VDD_HV_OSC_PMC | power_in | Oscillator and power management unit power supply input, 3.3V or 5V. |
| 38 | TDI | input | JTAG Test Data Input pin for boundary scan and debug interface. |
| 39 | TMS | input | JTAG Test Mode Select input pin for boundary scan and debug interface. |
| 40 | TDO | output | JTAG Test Data Output pin for boundary scan and debug interface. |
| 41 | PC[15] | bidirectional | Port C bit 15 general-purpose I/O pin supporting NMI and external interrupt. |
| 42 | TCK | input | JTAG Test Clock input pin for boundary scan and debug interface. |
| 43 | TESTMODE | input | Test mode control input pin for manufacturing test modes. |
| 44 | PORST | input | Power-on reset active-low input pin with internal weak pull-up. |
| 45 | VDD_LV | power_in | Low voltage (1.2V) power supply input for core processor and PLL. |
| 46 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 47 | PD[7] | bidirectional | Port D bit 7 general-purpose I/O pin. |
| 48 | PD[8] | bidirectional | Port D bit 8 general-purpose I/O pin. |
| 49 | PD[9] | bidirectional | Port D bit 9 general-purpose I/O pin. |
| 50 | PD[10] | bidirectional | Port D bit 10 general-purpose I/O pin. |
| 51 | PD[11] | bidirectional | Port D bit 11 general-purpose I/O pin. |
| 52 | PD[14] | bidirectional | Port D bit 14 general-purpose I/O pin. |
| 53 | PD[15] | bidirectional | Port D bit 15 general-purpose I/O pin. |
| 54 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 55 | PE[2] | bidirectional | Port E bit 2 general-purpose I/O pin. |
| 56 | PE[3] | bidirectional | Port E bit 3 general-purpose I/O pin. |
| 57 | PE[5] | bidirectional | Port E bit 5 general-purpose I/O pin. |
| 58 | PE[6] | bidirectional | Port E bit 6 general-purpose I/O pin. |
| 59 | PE[7] | bidirectional | Port E bit 7 general-purpose I/O pin. |
| 60 | PE[8] | bidirectional | Port E bit 8 general-purpose I/O pin. |
| 61 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 62 | PE[11] | bidirectional | Port E bit 11 general-purpose I/O pin. |
| 63 | PE[14] | bidirectional | Port E bit 14 general-purpose I/O pin. |
| 64 | PE[15] | bidirectional | Port E bit 15 general-purpose I/O pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
SPC570S50E1CEFAR - Footprint:
Package_QFP:TQFP-64_10x10mm_P0.5mm - 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
spc570s50e1cefar-etched.step/spc570s50e1cefar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);spc570s50e1cefar.step/spc570s50e1cefar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (75 pp, sha256
c64ec0a7c0498196, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SPC570S50E1CEFAR
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · TQFP-64(10x10)
SPC570S50E1CEFAR from STMicroelectronics, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FCCU_F0 | output | Fault Collection Control Unit Flag 0 output signal. |
| 2 | PA[0] | bidirectional | Port A bit 0 general-purpose I/O pin. |
| 3 | PA[3] | bidirectional | Port A bit 3 general-purpose I/O pin. |
| 4 | PA[4] | bidirectional | Port A bit 4 general-purpose I/O pin. |
| 5 | PA[7] | bidirectional | Port A bit 7 general-purpose I/O pin. |
| 6 | PA[8] | bidirectional | Port A bit 8 general-purpose I/O pin. |
| 7 | PA[9] | bidirectional | Port A bit 9 general-purpose I/O pin. |
| 8 | PA[11] | bidirectional | Port A bit 11 general-purpose I/O pin. |
| 9 | PA[12] | bidirectional | Port A bit 12 general-purpose I/O pin. |
| 10 | PA[13] | bidirectional | Port A bit 13 general-purpose I/O pin. |
| 11 | PA[14] | bidirectional | Port A bit 14 general-purpose I/O pin. |
| 12 | VDD_LV | power_in | Low voltage (1.2V) power supply input for core processor and PLL. |
| 13 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 14 | PB[3] | input | Port B bit 3 analog input pin for ADC channel 9. |
| 15 | PB[4] | input | Port B bit 4 analog input pin for ADC channel 8. |
| 16 | PB[5] | input | Port B bit 5 analog input pin for ADC channel 7. |
| 17 | PB[6] | input | Port B bit 6 analog input pin for ADC channel 6. |
| 18 | PB[7] | input | Port B bit 7 analog input pin for ADC channel 5. |
| 19 | VREFH_ADC | power_in | ADC high reference voltage supply input pin, 0V to VDD_HV_ADC_TSENS. |
| 20 | PB[10] | input | Port B bit 10 analog input pin for ADC channel 4. |
| 21 | PB[11] | input | Port B bit 11 analog input pin for ADC channel 3. |
| 22 | PB[14] | input | Port B bit 14 analog input pin for ADC channel 2. |
| 23 | PB[15] | input | Port B bit 15 analog input pin for ADC channel 1. |
| 24 | PC[1] | input | Port C bit 1 analog input pin for ADC channel 0. |
| 25 | VDD_HV_ADC_TSENS | power_in | ADC and temperature sensor power supply input, 3.3V or 5V. |
| 26 | PC[2] | bidirectional | Port C bit 2 general-purpose I/O pin. |
| 27 | PC[3] | bidirectional | Port C bit 3 general-purpose I/O pin. |
| 28 | PC[4] | bidirectional | Port C bit 4 general-purpose I/O pin. |
| 29 | PC[7] | bidirectional | Port C bit 7 general-purpose I/O pin. |
| 30 | PC[8] | bidirectional | Port C bit 8 general-purpose I/O pin. |
| 31 | PC[11] | bidirectional | Port C bit 11 general-purpose I/O pin. |
| 32 | FCCU_F1 | output | Fault Collection Control Unit Flag 1 output signal. |
| 33 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 34 | VDD_LV | power_in | Low voltage (1.2V) power supply input for core processor and PLL. |
| 35 | EXTAL | passive | External crystal oscillator input pin for external crystal or resonator connection. |
| 36 | XTAL | passive | External crystal oscillator output connection pin for external crystal or resonator. |
| 37 | VDD_HV_OSC_PMC | power_in | Oscillator and power management unit power supply input, 3.3V or 5V. |
| 38 | TDI | input | JTAG Test Data Input pin for boundary scan and debug interface. |
| 39 | TMS | input | JTAG Test Mode Select input pin for boundary scan and debug interface. |
| 40 | TDO | output | JTAG Test Data Output pin for boundary scan and debug interface. |
| 41 | PC[15] | bidirectional | Port C bit 15 general-purpose I/O pin supporting NMI and external interrupt. |
| 42 | TCK | input | JTAG Test Clock input pin for boundary scan and debug interface. |
| 43 | TESTMODE | input | Test mode control input pin for manufacturing test modes. |
| 44 | PORST | input | Power-on reset active-low input pin with internal weak pull-up. |
| 45 | VDD_LV | power_in | Low voltage (1.2V) power supply input for core processor and PLL. |
| 46 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 47 | PD[7] | bidirectional | Port D bit 7 general-purpose I/O pin. |
| 48 | PD[8] | bidirectional | Port D bit 8 general-purpose I/O pin. |
| 49 | PD[9] | bidirectional | Port D bit 9 general-purpose I/O pin. |
| 50 | PD[10] | bidirectional | Port D bit 10 general-purpose I/O pin. |
| 51 | PD[11] | bidirectional | Port D bit 11 general-purpose I/O pin. |
| 52 | PD[14] | bidirectional | Port D bit 14 general-purpose I/O pin. |
| 53 | PD[15] | bidirectional | Port D bit 15 general-purpose I/O pin. |
| 54 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 55 | PE[2] | bidirectional | Port E bit 2 general-purpose I/O pin. |
| 56 | PE[3] | bidirectional | Port E bit 3 general-purpose I/O pin. |
| 57 | PE[5] | bidirectional | Port E bit 5 general-purpose I/O pin. |
| 58 | PE[6] | bidirectional | Port E bit 6 general-purpose I/O pin. |
| 59 | PE[7] | bidirectional | Port E bit 7 general-purpose I/O pin. |
| 60 | PE[8] | bidirectional | Port E bit 8 general-purpose I/O pin. |
| 61 | VDD_HV_IO | power_in | High voltage I/O power supply input, 3.3V or 5V operation supported. |
| 62 | PE[11] | bidirectional | Port E bit 11 general-purpose I/O pin. |
| 63 | PE[14] | bidirectional | Port E bit 14 general-purpose I/O pin. |
| 64 | PE[15] | bidirectional | Port E bit 15 general-purpose I/O pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
## CAD (KiCad official)
- Symbol: `SPC570S50E1CEFAR`
- Footprint: `Package_QFP:TQFP-64_10x10mm_P0.5mm`
- 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `spc570s50e1cefar-etched.step` / `spc570s50e1cefar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `spc570s50e1cefar.step` / `spc570s50e1cefar.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918769339416576) (75 pp, sha256 `c64ec0a7c0498196`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/spc570s50e1cefar-datasheet.pdf)