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README

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SP8M51-TB-VB

VBsemi Elec · MOSFETs · SO-8

SP8M51-TB-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of the N-channel MOSFET (Q1), 100 V VDS rated device.
2 G1 input Gate of the N-channel MOSFET (Q1), with VGS rated at ±20 V.
3 S2 passive Source of the P-channel MOSFET (Q2), -100 V VDS rated device.
4 G2 input Gate of the P-channel MOSFET (Q2), with VGS rated at ±20 V.
5 D2 passive Drain of the P-channel MOSFET (Q2), tied with pin 6, rated at -100 V VDS.
6 D2 passive Drain of the P-channel MOSFET (Q2), tied with pin 5, rated at -100 V VDS.
7 D1 passive Drain of the N-channel MOSFET (Q1), tied with pin 8, rated at 100 V VDS.
8 D1 passive Drain of the N-channel MOSFET (Q1), tied with pin 7, rated at 100 V VDS.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage N-Ch VDS 100 V N-Channel, TA = 25 °C 1
Drain-Source Voltage P-Ch VDS -100 V P-Channel, TA = 25 °C 1
Gate-Source Voltage VGS -20 20 V TA = 25 °C 1
Pulsed Drain Current N-Ch IDM 8 A N-Channel, 100 μs pulse width 1
Pulsed Drain Current P-Ch IDM -6 A P-Channel, 100 μs pulse width 1
Pulsed Source-Drain Current N-Ch ISM 8 A N-Channel, 100 μs pulse width 1
Pulsed Source-Drain Current P-Ch ISM -6 A P-Channel, 100 μs pulse width 1
Single Pulse Avalanche Energy N-Ch EAS 0.45 mJ L = 0.1 mH 1
Power Dissipation N-Ch PD 2.5 W N-Channel, TF = 25 °C 1
Power Dissipation P-Ch PD 1.8 W P-Channel, TF = 25 °C 1
Operating Junction and Storage Temperature TJ, Tstg -55 150 °C 1
Junction-to-Ambient N-Ch RthJA 35 55 °C/W N-Channel, t ≤ 10 s 1
Junction-to-Ambient P-Ch RthJA 33 55 °C/W P-Channel, t ≤ 10 s 1
Junction-to-Foot N-Ch RthJF 20 35 °C/W N-Channel, steady state 1
Junction-to-Foot P-Ch RthJF 17 30 °C/W P-Channel, steady state 1
Drain-Source Breakdown Voltage N-Ch VDS 100 V VGS = 0 V, ID = 250 μA 2
Drain-Source Breakdown Voltage P-Ch VDS -100 V VGS = 0 V, ID = -250 μA 2
Gate Threshold Voltage N-Ch VGS(th) 1.5 3 V VDS = VGS, ID = 250 μA 2
Gate Threshold Voltage P-Ch VGS(th) -1 -2.5 V VDS = VGS, ID = -250 μA 2
Gate-Body Leakage N-Ch IGSS 100 nA VDS = 0 V, VGS = ± 20 V 2
Gate-Body Leakage P-Ch IGSS -100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current N-Ch IDSS 1 μA VDS = 100 V, VGS = 0 V 2
Zero Gate Voltage Drain Current P-Ch IDSS -1 μA VDS = -100 V, VGS = 0 V 2
Zero Gate Voltage Drain Current N-Ch hot IDSS 10 μA VDS = 100 V, VGS = 0 V, TJ = 55 °C 2
Zero Gate Voltage Drain Current P-Ch hot IDSS -10 μA VDS = -100 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current N-Ch ID(on) 10 A VDS = 5 V, VGS = 10 V 2
On-State Drain Current P-Ch ID(on) -10 A VDS = -5 V, VGS = -10 V 2
Drain-Source On-State Resistance N-Ch 10 V RDS(on) 0.24 Ω VGS = 10 V, ID = 2 A 2
Drain-Source On-State Resistance N-Ch 4.5 V RDS(on) 0.26 Ω VGS = 4.5 V, ID = 1.5 A 2
Drain-Source On-State Resistance P-Ch 10 V RDS(on) 0.49 Ω VGS = -10 V, ID = -2 A 2
Drain-Source On-State Resistance P-Ch 4.5 V RDS(on) 0.53 Ω VGS = -4.5 V, ID = -1 A 2
Gate Resistance N-Ch Rg 0.6 3.3 6.6 Ω f = 1 MHz 2
Gate Resistance P-Ch Rg 3 13 26 Ω f = 1 MHz 2
Turn-On Delay Time N-Ch 10 V td(on) 5 10 ns VDD = 50 V, RL = 13.8 Ω, ID ≅ 2.6 A, VGEN = 10 V, Rg = 1 Ω 3
Turn-On Delay Time P-Ch 10 V td(on) 7 15 ns VDD = -50 V, RL = 12.5 Ω, ID ≅ -2 A, VGEN = -10 V, Rg = 1 Ω 3
Rise Time P-Ch 10 V tr 11 20 ns VDD = -50 V, RL = 12.5 Ω, ID ≅ -2 A, VGEN = -10 V, Rg = 1 Ω 3
Turn-Off Delay Time N-Ch 10 V td(off) 12 25 ns VDD = 50 V, RL = 13.8 Ω, ID ≅ 2.6 A, VGEN = 10 V, Rg = 1 Ω 3
Turn-Off Delay Time P-Ch 10 V td(off) 65 130 ns VDD = -50 V, RL = 12.5 Ω, ID ≅ -2 A, VGEN = -10 V, Rg = 1 Ω 3
Fall Time N-Ch 10 V tf 6 15 ns VDD = 50 V, RL = 13.8 Ω, ID ≅ 2.6 A, VGEN = 10 V, Rg = 1 Ω 3
Fall Time P-Ch 10 V tf 20 40 ns VDD = -50 V, RL = 12.5 Ω, ID ≅ -2 A, VGEN = -10 V, Rg = 1 Ω 3
Turn-On Delay Time N-Ch 4.5 V td(on) 32 65 ns VDD = 50 V, RL = 13.8 Ω, ID ≅ 2.6 A, VGEN = 4.5 V, Rg = 1 Ω 3
Turn-On Delay Time P-Ch 4.5 V td(on) 55 110 ns VDD = -50 V, RL = 12.5 Ω, ID ≅ -2 A, VGEN = -4.5 V, Rg = 1 Ω 3
Rise Time N-Ch 4.5 V tr 73 150 ns VDD = 50 V, RL = 13.8 Ω, ID ≅ 2.6 A, VGEN = 4.5 V, Rg = 1 Ω 3
Rise Time P-Ch 4.5 V tr 80 160 ns VDD = -50 V, RL = 12.5 Ω, ID ≅ -2 A, VGEN = -4.5 V, Rg = 1 Ω 3
Turn-Off Delay Time N-Ch 4.5 V td(off) 14 30 ns VDD = 50 V, RL = 13.8 Ω, ID ≅ 2.6 A, VGEN = 4.5 V, Rg = 1 Ω 3
Turn-Off Delay Time P-Ch 4.5 V td(off) 42 85 ns VDD = -50 V, RL = 12.5 Ω, ID ≅ -2 A, VGEN = -4.5 V, Rg = 1 Ω 3
Fall Time N-Ch 4.5 V tf 12 25 ns VDD = 50 V, RL = 13.8 Ω, ID ≅ 2.6 A, VGEN = 4.5 V, Rg = 1 Ω 3
Fall Time P-Ch 4.5 V tf 25 50 ns VDD = -50 V, RL = 12.5 Ω, ID ≅ -2 A, VGEN = -4.5 V, Rg = 1 Ω 3
Pulse Diode Forward Current N-Ch ISM 30 A 3
Pulse Diode Forward Current P-Ch ISM -20 A 3
Body Diode Voltage N-Ch VSD 0.83 1.2 V IS = 2.6 A 3
Body Diode Voltage P-Ch VSD -0.8 -1.2 V IS = -2 A 3
Body Diode Reverse Recovery Time N-Ch trr 30 60 ns IF = 2.6 A, dI/dt = 100 A/μs, TJ = 25 °C 3
Body Diode Reverse Recovery Time P-Ch trr 42 85 ns IF = -2 A, dI/dt = -100 A/μs, TJ = 25 °C 3
Body Diode Reverse Recovery Charge N-Ch Qrr 27 55 nC IF = 2.6 A, dI/dt = 100 A/μs, TJ = 25 °C 3
Body Diode Reverse Recovery Charge P-Ch Qrr 93 190 nC IF = -2 A, dI/dt = -100 A/μs, TJ = 25 °C 3

CAD (KiCad official)

  • Symbol: SP8M51-TB-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: sp8m51-tb-vb-etched.step / sp8m51-tb-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp8m51-tb-vb.step / sp8m51-tb-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (14 pp, sha256 8250f2af166dfa5c, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF