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docs sp809ek-l-2-9: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
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package.json Publish 0.2.0 · Ray 1mo ago
page.json sp809ek-l-2-9: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 17h ago
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sp809ek-l-2-9-etched.fit.json sp809ek-l-2-9: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sp809ek-l-2-9-etched.glb sp809ek-l-2-9: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sp809ek-l-2-9-etched.step sp809ek-l-2-9: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sp809ek-l-2-9.glb Publish 0.1.0 · Ray 1mo ago
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sp809ek-l-2-9.step Publish 0.1.0 · Ray 1mo ago

SP809EK-L-2-9

MaxLinear · Supervisor and Reset ICs · SOT-23

SP809EK-L-2-9 from MaxLinear, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / supply return.
2 ~RESET output Active-low push-pull reset output for the SP809. RESET is asserted low while VCC is below the 2.9V reset threshold and remains low for the 140ms (typ 230ms) reset timeout after VCC recovers above threshold. VOL ≤ 0.3V at 1.2mA sink; VOH ≥ 0.8·VCC at 1.2mA source.
3 VCC power_in Supply voltage input. Operating range 0.9V to 6.0V; absolute maximum 6.5V. Monitored against the internal 2.9V (SP809EK-L-2-9) reset threshold.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • SP809EK-L-2-9/TR
  • SP809EK-L-2-3/TR
  • SP809EK-L-2-6/TR
  • SP809EK-L-3-1/TR
  • SP809EK-L-4-6/TR
  • SP809NEK-L-2-3/TR
  • SP809NEK-L-2-9/TR
  • SP809NEK-L-3-1/TR
  • SP809NEK-L-4-6/TR
  • SP809EK-L-2-9SP810EK-L-4-4/TR

CAD (KiCad official)

  • Symbol: SP809EK-L-2-9
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: sp809ek-l-2-9-etched.step / sp809ek-l-2-9-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp809ek-l-2-9.step / sp809ek-l-2-9.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sp809ek-l-2-9.step 59 KB You want the bare part, or you mark your own boards.
sp809ek-l-2-9-etched.step 2.1 MB You want the part with SP809EK-L-2-9 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 503 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (8 pp, sha256 ee58ead697ccce7e, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF