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SP720ABTG

Littelfuse · ESD And Surge Protection (TVS/ESD) · SOIC-16

SP720ABTG from Littelfuse, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
2 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
3 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
4 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
5 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
6 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
7 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
8 V- power_in Negative supply pin; an input is clamped to V- when it falls one VBE diode threshold below V-, and the supply (V+) - (V-) operating range is 2V to 30V.
9 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
10 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
11 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
12 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
13 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
14 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
15 IN input Protected signal input that is clamped to V+ when it rises more than one VBE above V+, with a single-ended range to +30V and a differential range to ±15V.
16 V+ power_in Positive supply pin; the SCR clamp to V+ triggers at one VBE diode threshold above V+, and the supply (V+) - (V-) operating range is 2V to 30V with absolute maximum 35V.

Key specifications

Parameter Value
Manufacturer Littelfuse
Package SOIC-16
Category Circuit Protection
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Leakage Current IIN -20 5 20 nA 2
Quiescent Supply Current IQUIESCENT 50 200 nA 2
Operating Voltage Range, VSUPPLY = [(V+) - (V-)] VSUPPLY 2 30 V 2
Continuous Supply Voltage, (V+) - (V-) 35 V 2
Forward Peak Current, IIN to VCC, IIN to GND -2 2 A 100µs 2
Maximum Storage Temperature Range -65 150 oC 2
Maximum Junction Temperature (Plastic Package) 150 oC 2
Maximum Lead Temperature (Soldering 20-40s) (SOIC Lead Tips Only) 260 oC Soldering 20-40s, SOIC lead tips only 2
Operating Temperature Range TA -40 105 oC 2
Thermal Resistance (Typical, Note 1) θJA, SOIC Package θJA 130 oC/W SOIC package; typical, Note 1 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper Alloy tin Lead Plating Matte Tin Lead Material Copper Alloy 6

CAD (KiCad official)

  • Symbol: SP720ABTG
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sp720abtg-etched.step / sp720abtg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp720abtg.step / sp720abtg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Littelfuse datasheet (6 pp, sha256 070ba288abaa9564, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF