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SP706TCN-L

MaxLinear · Monitors & Reset Circuits · SOIC-8

SP706TCN-L from MaxLinear, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input Active-LOW manual reset input that triggers a reset pulse when pulled below 0.8V and has an internal 70µA pull-up current.
2 VCC power_in Supply voltage input; the datasheet gives an operating voltage range of 1.0V to 5.5V.
3 GND power_in Ground reference for all signals.
4 PFI input Power-fail voltage monitor input; PFO goes LOW when PFI is less than 1.25V, and PFI should be connected to ground or VCC when not in use.
5 PFO output Power-fail output that stays HIGH until PFI is less than 1.25V.
6 WDI input Watchdog input; if it remains HIGH or LOW for 1.6s the watchdog times out and WDO goes LOW, and floating WDI disables the watchdog.
7 RESET output Active-LOW reset output that pulses LOW for 200ms when triggered and stays LOW whenever VCC is below the reset threshold.
8 WDO output Watchdog output that goes LOW when the watchdog timer finishes its 1.6s count and also whenever VCC is below the reset threshold.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply current ISUPPLY 25 40 µA MR = VCC or floating, WDI floating, VCC = 3.3V 7
Supply current ISUPPLY 40 80 µA MR = VCC or floating, VCC = 5.5V 7
Reset threshold SP706T, SP708T VRST 3 3.08 3.15 V 7
Reset threshold hysteresis 20 mV 7
Reset pulse width tRS 140 200 280 ms 7
Watchdog timeout period tWD 1 1.6 2.25 s VCC < 3.6V 7
WDI pulse width tWP 50 ns VIL = 0.4V, VIH = 0.8 x VCC 7
WDI input threshold VIL VIL 0.6 V VRST(MAX) < VCC < 3.6V 7
WDI input threshold VIL VIL 0.8 V VCC = 5V 7
WDI input threshold VIH VIH 3.5 V VCC = 5V 7
WDI input current -1 0.02 1 µA WDI = 0V or WDI = VCC 7
RESET output voltage VOL VOL 0.3 V VRST(MAX) < VCC < 3.6V, ISINK = 1.2mA 7
RESET output voltage VOL VOL 0.4 V 4.5V < VCC < 5.5V, ISINK = 3.2mA 7
WDO output voltage VOL VOH 0.3 V VRST(MAX) < VCC < 3.6V, ISINK = 1.2mA 7
WDO output voltage VOL VIH 0.4 V 4.5V < VCC < 5.5V, ISINK = 3.2mA 7
MR pull-up current 25 70 250 µA MR = 0V, VRST(MAX) < VCC < 3.6V 7
MR pull-up current 100 250 600 µA MR = 0V, 4.5V < VCC < 5.5V 7
MR pulse width tMR 500 ns VRST(MAX) < VCC < 3.6V 7
MR pulse width tMR 150 ns 4.5V < VCC < 5.5V 7
MR input threshold VIL VIL 0.6 V VRST(MAX) < VCC < 3.6V 8
MR input threshold VIL VIL 0.8 V 4.5V < VCC < 5.5V 8
MR input threshold VIH VIH 2 V 4.5V < VCC < 5.5V 8
MR to reset out delay tMD 750 ns VRST(MAX) < VCC < 3.6V 8
MR to reset out delay tMD 250 ns 4.5V < VCC < 5.5V 8
PFI input threshold 1.2 1.25 1.3 V VCC = 3.0V - SP706R, PFI falling; VCC = 3.3V - SP70xS/T, PFI falling 8
PFI input current -200 0.01 200 nA VPFI = 1.36V 8
PFO output voltage VOL VIH 0.3 V VRST(MAX) < VCC < 3.6V, ISINK = 1.2mA 8
PFO output voltage VOL VIH 0.4 V 4.5V < VCC < 5.5V, ISINK = 3.2mA 8
Operating voltage range 1 5.5 V 7
Supply voltage range (SP706T) VCC 3 5.5 V VCC = 3.0V to 5.5V (SP70xT), TA = TMIN to TMAX 7
Operating temperature range TA 0 70 °C 0°C ≤ TA ≤ 70°C (SP706TCN-L/TR, NSOIC8) 21
Input voltage (all other inputs) -0.3 6 V VCC + 0.3V upper limit as printed; PFI, WDI, MR may exceed if input current < 10mA 6
VCC supply voltage VCC -0.3 6 V 6
VCC input current 20 mA 6
GND input current 20 mA 6
Output current 20 mA All outputs 6
Continuous power dissipation, SO 471 mW derate 5.88mW/°C above 70°C 6
Storage temperature -65 160 °C 6
Lead temperature 300 °C soldering, 10 sec 6
HBM ESD rating 2 kV Human Body Model 6

CAD (KiCad official)

  • Symbol: SP706TCN-L
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: sp706tcn-l-etched.step / sp706tcn-l-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp706tcn-l.step / sp706tcn-l.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (22 pp, sha256 e470a4cd75d225d7, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF