# SP60N55T2

**Siliup** · MOSFETs · SOT-23

SP60N55T2 from Siliup, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±20 V with threshold of 1 V min to 2.5 V max at 250 µA. |
| 2 | S | passive | Source; connects to the load return/ground side of the N-channel MOSFET, continuous drain current 3.5 A. |
| 3 | D | passive | Drain; drain-source voltage rated 60 V, continuous drain current 3.5 A and pulsed 14 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS |  |  | 60 | V |  | 2 |
| Gate-Source Voltage | VGSS | -20 |  | 20 | V |  | 2 |
| Continuous Drain Current | ID |  |  | 3.5 | A |  | 2 |
| Pulse Drain Current Tested | IDM |  |  | 14 | A |  | 2 |
| Power Dissipation | PD |  |  | 1.2 | W |  | 2 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 2 |
| Operating Junction Temperature Range | TJ | -55 |  | 150 | °C |  | 2 |
| Thermal Resistance Junction-to-Ambient | RθJA |  |  | 104 | °C/W |  | 2 |
| Drain-Source Breakdown Voltage | BVDSS | 60 |  |  | V | VGS=0V, ID=250µA | 2 |
| Drain-Source Leakage Current | IDSS |  |  | 1 | uA | VDS=48V, VGS=0V | 2 |
| Gate-Source Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | 1.6 | 2.5 | V | VDS=VGS, ID=250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  | 55 | 80 | mΩ | VGS=10V, ID=3A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  | 70 | 100 | mΩ | VGS=4.5V, ID=2A | 2 |
| Diode Forward Voltage | VSD |  |  | 1.2 | V | VGS=0V, IS=1A, TJ=25℃ | 2 |

## CAD (KiCad official)

- Symbol: `SP60N55T2`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `sp60n55t2-etched.step` / `sp60n55t2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sp60n55t2.step` / `sp60n55t2.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Siliup datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604425080415924224) (5 pp, sha256 `ad506450cfe92013`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sp60n55t2-datasheet.pdf)