component

SP6038CP8

Public Made by Adom

by adom

Siliup MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorssp6038cp8factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 24d ago
viewers sp6038cp8: viewers · Ray 24d ago
package.json Publish 0.1.0 · Ray 24d ago
page.json Set visibility: public · Ray 24d ago
README.md Publish 0.1.0 · Ray 24d ago
sp6038cp8-etched.glb Publish 0.1.0 · Ray 24d ago
sp6038cp8-etched.step sp6038cp8: factory component page (tier=lcsc) · Ray 24d ago
sp6038cp8-hero.glb sp6038cp8: hero GLB from the etched model (keeps the MPN mark) · Ray 24d ago
sp6038cp8-hero.overlay.json Publish 0.1.0 · Ray 24d ago
sp6038cp8.glb Publish 0.1.0 · Ray 24d ago
sp6038cp8.kicad_mod Publish 0.1.0 · Ray 24d ago
sp6038cp8.kicad_sym Publish 0.1.0 · Ray 24d ago
sp6038cp8.lbr Publish 0.1.0 · Ray 24d ago
sp6038cp8.step Publish 0.1.0 · Ray 24d ago

SP6038CP8

Siliup · MOSFETs · SOP-8

SP6038CP8 from Siliup, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1, which the circuit diagram draws as the N-channel device (60V, 5A, RDS(on) 35mΩ typ at VGS=10V).
2 G1 input Gate of MOSFET 1, which the circuit diagram draws as the N-channel device; VGS maximum is ±20V and threshold is 1.0 to 2.5V.
3 S2 passive Source of MOSFET 2, which the circuit diagram draws as the P-channel device (-60V, -3.5A, RDS(on) 80mΩ typ at VGS=-10V).
4 G2 input Gate of MOSFET 2, which the circuit diagram draws as the P-channel device; VGS maximum is ±20V and threshold is -1.0 to -2.5V.
5 D2 passive Drain of MOSFET 2 (P-channel, VDS -60V maximum, ID -3.5A continuous); tied to pin 6.
6 D2 passive Drain of MOSFET 2 (P-channel, VDS -60V maximum, ID -3.5A continuous); tied to pin 5.
7 D1 passive Drain of MOSFET 1 (N-channel, VDS 60V maximum, ID 5A continuous); tied to pin 8.
8 D1 passive Drain of MOSFET 1 (N-channel, VDS 60V maximum, ID 5A continuous); tied to pin 7.

Key specifications

Parameter Value
Manufacturer Siliup
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (N-Channel) VDS 60 V 2
Drain-Source Voltage (P-Channel) VDS -60 V 2
Gate-Source Voltage (N- and P-Channel) VGS -20 20 V 2
Continuous Drain Current (N-Channel) ID 5 A 2
Continuous Drain Current (P-Channel) ID -3.5 A 2
Pulsed Drain Current (N-Channel) IDM 20 A 2
Pulsed Drain Current (P-Channel) IDM -14 A 2
Single Pulse Avalanche Energy (N-Channel) EAS 18 mJ Note 1: VDD=30V, VGS=10V, L=0.5mH, RG=25Ω 2
Single Pulse Avalanche Energy (P-Channel) EAS 30 mJ Note 1: VDD=-30V, VGS=-10V, L=0.5mH, RG=25Ω 2
Power Dissipation PD 2 W 2
Thermal Resistance Junction-to-Ambient RθJA 62.5 ℃/W 2
Storage Temperature Range TSTG -55 150 ℃ 2
Operating Junction Temperature Range TJ -55 150 ℃ 2
Drain-Source Breakdown Voltage (N-Channel) BVDSS 60 V VGS=0V, ID=250uA 2
Drain-Source Leakage Current (N-Channel) IDSS 1 uA VDS=48V, VGS=0V, TJ=25℃ 2
Gate-Source Leakage Current (N-Channel) IGSS -100 100 nA VGS=±20V, VDS=0V 2
Gate Threshold Voltage (N-Channel) VGS(th) 1 1.6 2.5 V VGS=VDS, ID=250uA 2
Static Drain-Source On-Resistance (N-Channel) RDS(ON) 35 50 mΩ VGS=10V, ID=4.5A 2
Static Drain-Source On-Resistance (N-Channel) RDS(ON) 45 65 mΩ VGS=4.5V, ID=4A 2
Diode Forward Voltage (N-Channel) VSD 1.2 V VGS=0V, IS=1A, TJ=25℃ 2
Maximum Body-Diode Continuous Current (N-Channel) IS 5 A 2
Drain-Source Breakdown Voltage (P-Channel) BVDSS -60 V VGS=0V, ID=-250uA 3
Drain-Source Leakage Current (P-Channel) IDSS -1 uA VDS=-48V, VGS=0V, TJ=25℃ 3
Gate-Source Leakage Current (P-Channel) IGSS -100 100 nA VGS=±20V, VDS=0V 3
Gate Threshold Voltage (P-Channel) VGS(th) -1 -1.5 -2.5 V VGS=VDS, ID=-250uA 3
Static Drain-Source On-Resistance (P-Channel) RDS(ON) 80 100 mΩ VGS=-10V, ID=-3.5A 3
Static Drain-Source On-Resistance (P-Channel) RDS(ON) 95 125 mΩ VGS=-4.5V, ID=-2.5A 3
Diode Forward Voltage (P-Channel) VSD -1.2 V VGS=0V, IS=-1A, TJ=25℃ 3
Maximum Body-Diode Continuous Current (P-Channel) IS -3.5 A 3

CAD (KiCad official)

  • Symbol: SP6038CP8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: sp6038cp8-etched.step / sp6038cp8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp6038cp8.step / sp6038cp8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Siliup datasheet (8 pp, sha256 97fa85c0b69695a3, retrieved 2026-10-14, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF