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SP491ECN-L

Public Made by Adom

by adom

MaxLinear Pre-ordered Chips, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SP491ECN-L

MaxLinear · Pre-ordered Chips · SOIC-14

SP491ECN-L from MaxLinear, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connect.
2 R output Receiver output; the receiver output is held in a high state when the receiver inputs are left unconnected (fail-safe).
3 RE input Receiver output enable, active LOW; a logic high on RE tri-states the receiver.
4 DE input Driver output enable, active HIGH; a logic low on DE tri-states the driver outputs.
5 D input Driver input; input high voltage is 2.0V minimum and input low voltage is 0.8V maximum.
6 GND power_in Ground connection.
7 GND power_in Ground connection.
8 NC unconnected No connect.
9 Y output Non-inverting driver output; with 54Ω across the differential outputs the driver maintains greater than 1.5V levels.
10 Z output Inverting driver output; with 54Ω across the differential outputs the driver maintains greater than 1.5V levels.
11 B input Inverting receiver input; receiver sensitivity is ±200mV over a common-mode range of -7V to 12V.
12 A input Non-inverting receiver input; receiver sensitivity is ±200mV over a common-mode range of -7V to 12V.
13 NC unconnected No connect.
14 VCC power_in Positive supply, 4.75V to 5.25V.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package SOIC-14
Category Interface ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Differential output voltage 2 V With load; R = 50Ω (RS-422); Figure 1 6
Differential output voltage 1.5 V With load; R = 27Ω (RS-485); Figure 1 6
Change in magnitude of driver differential output voltage for complimentary states 0.2 V R = 27Ω or R = 50Ω; Figure 1 6
Driver common-mode output voltage 3 V R = 27Ω or R = 50Ω; Figure 1 6
Input high voltage 2 V Applies to DE, D, RE 6
Input low voltage 0.8 V Applies to DE, D, RE 6
Input current -10 10 µA Applies to DE, D, RE 6
Driver short circuit current -250 250 mA VOUT = HIGH; -7V ≤ VO ≤ 12V 6
Maximum data rate 10 Mbps RE = 5V, DE = 5V 7
Driver input to output, tPLH tPLH 30 60 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 & 5 7
Driver input to output, tPHL tPHL 30 60 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 & 5 7
Driver skew tSKEW 5 10 ns tSKEW = /tDPLH - tDPHL/; Figures 3 & 5 7
Driver rise or fall time 15 40 ns From 10%-90%; RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 & 5 7
Driver enable to output HIGH 40 70 ns CL1 = CL2 = 100pF; Figures 4 & 6, S2 closed 7
Driver enable to output LOW 40 70 ns CL1 = CL2 = 100pF; Figures 4 & 6, S1 closed 7
Driver disable time from LOW 40 70 ns CL1 = CL2 = 100pF; Figures 4 & 6, S1 closed 7
Driver disable time from HIGH 40 70 ns CL1 = CL2 = 100pF; Figures 4 & 6, S2 closed 7
Differential input threshold -0.2 0.2 V -7V ≤ VCM ≤ 12V 7
Input hysteresis 70 mV VCM = 0V 7
Output voltage HIGH 3.5 V VID = 200mV, IO = -4mA 7
Output voltage LOW 0.4 V VID = -200mV, IO = 4mA 7
Three-State (High Impedance) Output Current -1 1 µA 0.4V ≤ VO ≤ 2.4V; RE = 5V 7
Input resistance 12 15 kΩ -7V ≤ VCM ≤ 12V 7
Input current (A, B); VIN = 12V -1 1 mA DE = 0V, VCC = 0V or 5.25V, VIN = 12V 7
Input current (A, B); VIN = -7V -0.8 mA DE = 0V, VCC = 0V or 5.25V, VIN = -7V 7
Short circuit current 85 mA 0V ≤ VO ≤ VCC 7
Receiver input to output, tPLH tPLH 20 45 100 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 & 7 7
Receiver input to output, tPHL tPHL 20 45 100 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 & 7 7
Differential receiver skew /tPLH - tPHL/ 13 ns RDIFF = 54Ω, CL1 = CL2 = 100pF; Figures 3 & 7 7
Receiver enable to output LOW 45 70 ns CRL = 15pF; Figures 2 & 8; S1 closed 7
Receiver enable to output HIGH 45 70 ns CRL = 15pF; Figures 2 & 8; S2 closed 7
Receiver disable from LOW 45 70 ns CRL = 15pF; Figures 2 & 8; S1 closed 7
Receiver disable from HIGH 45 70 ns CRL = 15pF; Figures 2 & 8; S2 closed 7
Supply voltage VCC 4.75 5.25 V 8
Supply current 900 µA RE, D = 0V or VCC; DE = VCC 8
Operating temperature, Commercial (C) 0 70 °C Commercial (C) grade 8
Storage temperature -65 150 °C 6
Supply voltage VCC VCC 7 V 6
Receiver input voltage -14 14 V 6
Driver output voltage -14 14 V 6

CAD (KiCad official)

  • Symbol: SP491ECN-L
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sp491ecn-l-etched.step / sp491ecn-l-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp491ecn-l.step / sp491ecn-l.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (13 pp, sha256 6384730ddfde24eb, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF