component
SP481EEN-L
Public Made by Adomby adom
MaxLinear Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SP481EEN-L
MaxLinear · Pre-ordered Chips · SOIC-8
SP481EEN-L from MaxLinear, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO | output | Receiver output, tri-stated (high impedance) when RE is HIGH. |
| 2 | RE | input | Receiver output enable, active LOW; logic LOW enables the receiver and logic HIGH disables it. |
| 3 | DE | input | Driver output enable, active HIGH; logic HIGH enables the driver outputs and logic LOW tri-states them. |
| 4 | DI | input | Driver input. |
| 5 | GND | power_in | Ground connection. |
| 6 | A | bidirectional | Non-inverting driver output / receiver input, with ±15kV HBM and IEC61000-4-2 air discharge ESD protection. |
| 7 | B | bidirectional | Inverting driver output / receiver input, with ±15kV HBM and IEC61000-4-2 air discharge ESD protection. |
| 8 | VCC | power_in | Positive supply, 4.75V ≤ VCC ≤ 5.25V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MaxLinear |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Differential output voltage (R=50Ω) | 2 | V | With load; R = 50Ω (RS-422); Figure 1 | 2 | |||
| Differential output voltage (R=27Ω) | 1.5 | V | With load; R = 27Ω (RS-485); Figure 1 | 2 | |||
| Change in magnitude of driver differential output voltage | 0.2 | V | R = 27Ω or R = 50Ω; Figure 1 | 2 | |||
| Driver common-mode output voltage | 3 | V | R = 27Ω or R = 50Ω; Figure 1 | 2 | |||
| Input high voltage | 2 | V | Applies to DE, DI, RE | 2 | |||
| Input low voltage | 0.8 | V | Applies to DE, DI, RE | 2 | |||
| Input current | -10 | 10 | µA | Applies to DE, DI, RE | 2 | ||
| Driver short circuit current VOUT = HIGH | -250 | 250 | mA | -7V ≤ VO ≤ 12V | 2 | ||
| Driver short circuit current VOUT = LOW | -250 | 250 | mA | -7V ≤ VO ≤ 12V | 2 | ||
| Driver maximum data rate | 10 | Mbps | RE = 5V, DE = 5V; RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 | |||
| Driver input to output tPLH | tPLH | 30 | 60 | ns | See Figures 3 & 5, RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 | |
| Driver input to output tPHL | tPHL | 30 | 60 | ns | See Figures 3 & 5, RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 | |
| Driver skew | tSKEW | 5 | 10 | ns | See Figures 3 and 5, tSKEW = /tDPHL - tDPLH/ | 3 | |
| Driver rise or fall time | 15 | 40 | ns | From 10%-90%; RDIFF = 54Ω CL1 = CL2 = 100pF; See Figures 3 and 6 | 3 | ||
| Driver enable to output high | 40 | 70 | ns | CL = 100pF, See Figures 4 and 6, S2 closed | 3 | ||
| Driver enable to output low | 40 | 70 | ns | CL = 100pF, See Figures 4 and 6, S1 closed | 3 | ||
| Driver disable time from high | 40 | 70 | ns | CL = 100pF, See Figures 4 and 6, S2 closed | 3 | ||
| Driver disable time from low | 40 | 70 | ns | CL = 100pF, See Figures 4 and 6, S1 closed | 3 | ||
| Receiver differential input threshold | -0.2 | 0.2 | Volts | -7V ≤ VCM ≤ 12V | 3 | ||
| Input hysteresis | 20 | mV | VCM = 0V | 3 | |||
| Receiver output voltage high | VOH | 3.5 | Volts | VID = 200mV, IO = -4mA | 3 | ||
| Receiver output voltage low | VOL | 0.4 | Volts | VID = 200mV, IO = 4mA | 3 | ||
| Three-state (high impedance) output current | -1 | 1 | µA | 0.4V ≤ VO ≤ 2.4V; RE = 5V | 3 | ||
| Receiver input resistance | 12 | 15 | kΩ | -7V ≤ VCM ≤ 12V | 3 | ||
| Input current (A, B); VIN = 12V | 1 | mA | DE = 0V, VCC = 0V or 5.25V, VIN = 12V | 3 | |||
| Input current (A, B); VIN = -7V | -0.8 | mA | DE = 0V, VCC = 0V or 5.25V, VIN = -7V | 3 | |||
| Receiver short circuit current | 7 | 95 | mA | 0V ≤ VO ≤ VCC | 3 | ||
| Receiver maximum data rate | 10 | Mbps | RE = 0V, DE = 0V | 3 | |||
| Receiver input to output tPLH | tPLH | 20 | 45 | 100 | ns | See Figures 3 & 7, RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 |
| Receiver input to output tPHL | tPHL | 20 | 45 | 100 | ns | See Figures 3 & 7, RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 |
| Differential receiver skew | /tPHL - tPLH/ | 13 | ns | RDIFF = 54Ω, CL1 = CL2 = 100pF, See Figures 3 and 7 | 3 | ||
| Receiver enable to output low | 45 | 70 | ns | CRL = 15pF, Figures 2 & 8; S1 Closed | 3 | ||
| Receiver enable to output high | 45 | 70 | ns | CRL = 15pF, Figures 2 & 8; S2 Closed | 3 | ||
| Receiver disable from low | 45 | 70 | ns | CRL = 15pF, Figures 2 & 8; S1 Closed | 3 | ||
| Receiver disable from high | 45 | 70 | ns | CRL = 15pF, Figures 2 & 8; S2 Closed | 3 | ||
| Time to shutdown | 50 | 200 | 600 | ns | RE = 5V, DE = 0V | 4 | |
| Driver enable from shutdown to output high | 40 | 100 | ns | CL = 100pF; See Figures 4 and 6; S2 Closed | 4 | ||
| Driver enable from shutdown to output low | 40 | 100 | ns | CL = 100pF; See Figures 4 and 6; S1 Closed | 4 | ||
| Receiver enable from shutdown to output high | 300 | 1000 | ns | CL = 15pF; See Figures 2 and 8; S2 Closed | 4 | ||
| Receiver enable from shutdown to output low | 300 | 1000 | ns | CL = 15pF; See Figures 2 and 8; S1 Closed | 4 | ||
| Supply voltage | VCC | 4.75 | 5.25 | Volts | 4 | ||
| Supply current, driver enabled, no load | 900 | µA | RE, DI = 0V or VCC; DE = VCC | 4 | |||
| Supply current, receiver enabled, no load | 600 | µA | RE = 0V, DI = 0V or 5V; DE = 0V | 4 | |||
| Supply current, shutdown mode | 10 | µA | DE = 0V, RE = VCC | 4 | |||
| Operating temperature (Industrial) | -40 | 85 | °C | Industrial (E) | 4 | ||
| Storage temperature | -65 | 150 | °C | 2 | |||
| Supply voltage VCC | VCC | 7 | V | 2 | |||
| Input voltage, receivers | -15 | 15 | V | ±15V | 2 | ||
| Output voltage, drivers | -15 | 15 | V | ±15V | 2 | ||
| ESD HBM (A and B pins) | -15 | 15 | kV | Human Body Model | 2 | ||
| ESD HBM (all other pins) | -3 | 3 | kV | Human Body Model | 2 | ||
| ESD IEC61000-4-2 Air Discharge (A and B pins) | -15 | 15 | kV | 2 | |||
| ESD IEC61000-4-2 Contact Discharge (A and B pins) | -8 | 8 | kV | 2 |
CAD (KiCad official)
- Symbol:
SP481EEN-L - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sp481een-l-etched.step/sp481een-l-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sp481een-l.step/sp481een-l.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MaxLinear datasheet (9 pp, sha256
4a2a188692170b46, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SP481EEN-L
**MaxLinear** · Pre-ordered Chips · SOIC-8
SP481EEN-L from MaxLinear, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO | output | Receiver output, tri-stated (high impedance) when RE is HIGH. |
| 2 | RE | input | Receiver output enable, active LOW; logic LOW enables the receiver and logic HIGH disables it. |
| 3 | DE | input | Driver output enable, active HIGH; logic HIGH enables the driver outputs and logic LOW tri-states them. |
| 4 | DI | input | Driver input. |
| 5 | GND | power_in | Ground connection. |
| 6 | A | bidirectional | Non-inverting driver output / receiver input, with ±15kV HBM and IEC61000-4-2 air discharge ESD protection. |
| 7 | B | bidirectional | Inverting driver output / receiver input, with ±15kV HBM and IEC61000-4-2 air discharge ESD protection. |
| 8 | VCC | power_in | Positive supply, 4.75V ≤ VCC ≤ 5.25V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MaxLinear |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Differential output voltage (R=50Ω) | | 2 | | | V | With load; R = 50Ω (RS-422); Figure 1 | 2 |
| Differential output voltage (R=27Ω) | | 1.5 | | | V | With load; R = 27Ω (RS-485); Figure 1 | 2 |
| Change in magnitude of driver differential output voltage | | | | 0.2 | V | R = 27Ω or R = 50Ω; Figure 1 | 2 |
| Driver common-mode output voltage | | | | 3 | V | R = 27Ω or R = 50Ω; Figure 1 | 2 |
| Input high voltage | | 2 | | | V | Applies to DE, DI, RE | 2 |
| Input low voltage | | | | 0.8 | V | Applies to DE, DI, RE | 2 |
| Input current | | -10 | | 10 | µA | Applies to DE, DI, RE | 2 |
| Driver short circuit current VOUT = HIGH | | -250 | | 250 | mA | -7V ≤ VO ≤ 12V | 2 |
| Driver short circuit current VOUT = LOW | | -250 | | 250 | mA | -7V ≤ VO ≤ 12V | 2 |
| Driver maximum data rate | | 10 | | | Mbps | RE = 5V, DE = 5V; RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 |
| Driver input to output tPLH | tPLH | | 30 | 60 | ns | See Figures 3 & 5, RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 |
| Driver input to output tPHL | tPHL | | 30 | 60 | ns | See Figures 3 & 5, RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 |
| Driver skew | tSKEW | | 5 | 10 | ns | See Figures 3 and 5, tSKEW = /tDPHL - tDPLH/ | 3 |
| Driver rise or fall time | | | 15 | 40 | ns | From 10%-90%; RDIFF = 54Ω CL1 = CL2 = 100pF; See Figures 3 and 6 | 3 |
| Driver enable to output high | | | 40 | 70 | ns | CL = 100pF, See Figures 4 and 6, S2 closed | 3 |
| Driver enable to output low | | | 40 | 70 | ns | CL = 100pF, See Figures 4 and 6, S1 closed | 3 |
| Driver disable time from high | | | 40 | 70 | ns | CL = 100pF, See Figures 4 and 6, S2 closed | 3 |
| Driver disable time from low | | | 40 | 70 | ns | CL = 100pF, See Figures 4 and 6, S1 closed | 3 |
| Receiver differential input threshold | | -0.2 | | 0.2 | Volts | -7V ≤ VCM ≤ 12V | 3 |
| Input hysteresis | | | 20 | | mV | VCM = 0V | 3 |
| Receiver output voltage high | VOH | 3.5 | | | Volts | VID = 200mV, IO = -4mA | 3 |
| Receiver output voltage low | VOL | | | 0.4 | Volts | VID = 200mV, IO = 4mA | 3 |
| Three-state (high impedance) output current | | -1 | | 1 | µA | 0.4V ≤ VO ≤ 2.4V; RE = 5V | 3 |
| Receiver input resistance | | 12 | 15 | | kΩ | -7V ≤ VCM ≤ 12V | 3 |
| Input current (A, B); VIN = 12V | | | | 1 | mA | DE = 0V, VCC = 0V or 5.25V, VIN = 12V | 3 |
| Input current (A, B); VIN = -7V | | -0.8 | | | mA | DE = 0V, VCC = 0V or 5.25V, VIN = -7V | 3 |
| Receiver short circuit current | | 7 | | 95 | mA | 0V ≤ VO ≤ VCC | 3 |
| Receiver maximum data rate | | 10 | | | Mbps | RE = 0V, DE = 0V | 3 |
| Receiver input to output tPLH | tPLH | 20 | 45 | 100 | ns | See Figures 3 & 7, RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 |
| Receiver input to output tPHL | tPHL | 20 | 45 | 100 | ns | See Figures 3 & 7, RDIFF = 54Ω, CL1 = CL2 = 100pF | 3 |
| Differential receiver skew | /tPHL - tPLH/ | | | 13 | ns | RDIFF = 54Ω, CL1 = CL2 = 100pF, See Figures 3 and 7 | 3 |
| Receiver enable to output low | | | 45 | 70 | ns | CRL = 15pF, Figures 2 & 8; S1 Closed | 3 |
| Receiver enable to output high | | | 45 | 70 | ns | CRL = 15pF, Figures 2 & 8; S2 Closed | 3 |
| Receiver disable from low | | | 45 | 70 | ns | CRL = 15pF, Figures 2 & 8; S1 Closed | 3 |
| Receiver disable from high | | | 45 | 70 | ns | CRL = 15pF, Figures 2 & 8; S2 Closed | 3 |
| Time to shutdown | | 50 | 200 | 600 | ns | RE = 5V, DE = 0V | 4 |
| Driver enable from shutdown to output high | | | 40 | 100 | ns | CL = 100pF; See Figures 4 and 6; S2 Closed | 4 |
| Driver enable from shutdown to output low | | | 40 | 100 | ns | CL = 100pF; See Figures 4 and 6; S1 Closed | 4 |
| Receiver enable from shutdown to output high | | | 300 | 1000 | ns | CL = 15pF; See Figures 2 and 8; S2 Closed | 4 |
| Receiver enable from shutdown to output low | | | 300 | 1000 | ns | CL = 15pF; See Figures 2 and 8; S1 Closed | 4 |
| Supply voltage | VCC | 4.75 | | 5.25 | Volts | | 4 |
| Supply current, driver enabled, no load | | | | 900 | µA | RE, DI = 0V or VCC; DE = VCC | 4 |
| Supply current, receiver enabled, no load | | | | 600 | µA | RE = 0V, DI = 0V or 5V; DE = 0V | 4 |
| Supply current, shutdown mode | | | | 10 | µA | DE = 0V, RE = VCC | 4 |
| Operating temperature (Industrial) | | -40 | | 85 | °C | Industrial (_E_) | 4 |
| Storage temperature | | -65 | | 150 | °C | | 2 |
| Supply voltage VCC | VCC | | | 7 | V | | 2 |
| Input voltage, receivers | | -15 | | 15 | V | ±15V | 2 |
| Output voltage, drivers | | -15 | | 15 | V | ±15V | 2 |
| ESD HBM (A and B pins) | | -15 | | 15 | kV | Human Body Model | 2 |
| ESD HBM (all other pins) | | -3 | | 3 | kV | Human Body Model | 2 |
| ESD IEC61000-4-2 Air Discharge (A and B pins) | | -15 | | 15 | kV | | 2 |
| ESD IEC61000-4-2 Contact Discharge (A and B pins) | | -8 | | 8 | kV | | 2 |
## CAD (KiCad official)
- Symbol: `SP481EEN-L`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `sp481een-l-etched.step` / `sp481een-l-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sp481een-l.step` / `sp481een-l.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [MaxLinear datasheet](docs/sp481een-l-datasheet.pdf) (9 pp, sha256 `4a2a188692170b46`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sp481een-l-datasheet.pdf)