component
SP40P28TS
Public Made by Adomby adom
Siliup MOSFETs, SOT-23-6L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSP40P28TS
Siliup · MOSFETs · SOT-23-6L
SP40P28TS from Siliup, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain of the P-channel MOSFET, shorted to pins 2, 5 and 6; VDSS is -40V and continuous ID is -7A. |
| 2 | D | passive | Drain of the P-channel MOSFET, shorted to pins 1, 5 and 6; IDM pulsed drain current is -28A. |
| 3 | G | input | Gate of the P-channel MOSFET; VGSS is ±20V maximum and the threshold VGS(th) is -1.2V min to -2.5V max at ID=-250µA. |
| 4 | S | passive | Source of the P-channel MOSFET; RDS(on) is 28mΩ typ at VGS=-10V and 38mΩ typ at VGS=-4.5V. |
| 5 | D | passive | Drain of the P-channel MOSFET, shorted to pins 1, 2 and 6; the body diode forward voltage VSD is -1.2V max at IS=-1A. |
| 6 | D | passive | Drain of the P-channel MOSFET, shorted to pins 1, 2 and 5; power dissipation PD is 1.1W. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23-6L |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -40 | V | 2 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Continuous Drain Current | ID | -7 | A | 2 | |||
| Pulse Drain Current Tested | IDM | -28 | A | 2 | |||
| Power Dissipation | PD | 1.1 | W | 2 | |||
| Thermal Resistance Junction-to-Ambient | RθJA | 113 | °C/W | 2 | |||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 2 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | -40 | V | VGS=0V, ID=-250µA | 2 | ||
| Drain-Source Leakage Current | IDSS | -1 | uA | VDS=-32V, VGS=0V | 2 | ||
| Gate-Source Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Gate Threshold Voltage | VGS(th) | -1.2 | -1.5 | -2.5 | V | VDS=VGS, ID=-250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | 28 | 35 | mΩ | VGS=-10V, ID=-4.1A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 38 | 50 | mΩ | VGS=-4.5V, ID=-3A | 2 | |
| Diode Forward Voltage | VSD | -1.2 | V | VGS=0V, IS=-1A, TJ=25℃ | 2 |
CAD (KiCad official)
- Symbol:
SP40P28TS - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files:
sp40p28ts-etched.step/sp40p28ts-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sp40p28ts.step/sp40p28ts.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Siliup datasheet (5 pp, sha256
faf5f396aa557c61, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).