component

SP40P12TH

Public Made by Adom

by adom

Siliup MOSFETs, TO-252-2L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 17d ago
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README.md Publish 0.1.0 · Ray 17d ago
sp40p12th-etched.glb Publish 0.1.0 · Ray 17d ago
sp40p12th-etched.step sp40p12th: factory component page (tier=lcsc) · Ray 17d ago
sp40p12th-hero.glb sp40p12th: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
sp40p12th-hero.overlay.json Publish 0.1.0 · Ray 17d ago
sp40p12th.glb Publish 0.1.0 · Ray 17d ago
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sp40p12th.step Publish 0.1.0 · Ray 17d ago

SP40P12TH

Siliup · MOSFETs · TO-252-2L

SP40P12TH from Siliup, in a TO-252-2L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal of the P-channel MOSFET; the datasheet gives the gate-source voltage limit as ±20 V.
2 D passive Drain terminal of the MOSFET; the datasheet rates drain-source voltage at -40 V and continuous drain current at -30 A (-21 A at TC=100℃).
3 S passive Source terminal of the MOSFET; it is the reference for the gate-source voltage (VGS) and the drain-source ratings.

Key specifications

Parameter Value
Manufacturer Siliup
Package TO-252-2L
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -40 V 2
Gate-Source Voltage VGS -20 20 V 2
Drain Current-Continuous ID -30 A 2
Drain Current-Continuous ID (100℃) -21 A TC=100℃ 2
Pulsed Drain Current IDM -120 A 2
Maximum Power Dissipation PD 52 W 2
Single pulse avalanche energy EAS 133 mJ 2
Thermal Resistance, Junction-to-Case RθJC 2.4 ℃/W 2
Operating Junction and Storage Temperature Range TJ,TSTG -55 150 ℃ 2
Drain-Source Breakdown Voltage BVDSS -40 V VGS=0V ID=-250μA 2
Zero Gate Voltage Drain Current IDSS -1 μA VDS=-40V,VGS=0V 2
Gate-Body Leakage Current IGSS -100 100 nA VGS=±20V,VDS=0V 2
Gate Threshold Voltage VGS(th) -1 -1.7 -2.5 V VDS=VGS,ID=-250μA 2
Drain-Source On-State Resistance RDS(ON) 12 15 mΩ VGS=-10V, ID=-15A 2
Drain-Source On-State Resistance RDS(ON) 16 22 mΩ VGS=-4.5V, ID=-10A 2
Diode Forward Voltage VSD -1.2 V VGS=0V,IS=-12A 2

CAD (KiCad official)

  • Symbol: SP40P12TH
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252-2L (KiCad packages3D, STEP)
  • 3D model files: sp40p12th-etched.step / sp40p12th-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp40p12th.step / sp40p12th.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Siliup datasheet (5 pp, sha256 bd657ad4f6d2a1c6, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF