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Contents

README

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SP40N04TH

Siliup · MOSFETs · TO-252-2L

SP40N04TH from Siliup, in a TO-252-2L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal of the MOSFET; the datasheet limits gate-source voltage to ±20 V (absolute maximum rating).
2 D passive Drain terminal of the MOSFET; the datasheet rates drain-source voltage at 40 V and continuous drain current at 85 A (TC=25℃).
3 S passive Source terminal of the MOSFET; the datasheet rates maximum body-diode continuous current at 85 A.

Key specifications

Parameter Value
Manufacturer Siliup
Package TO-252-2L
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 40 V 2
Gate-Source Voltage VGS -20 20 V 2
Continuous Drain Current ID 85 A TC=25℃ 2
Continuous Drain Current ID 57 A TC=100℃ 2
Pulsed Drain Current IDM 340 A 2
Single Pulse Avalanche Energy EAS 288 mJ VDD=20V, VGS=10V, L=1mH, RG=25Ω (note 1) 2
Power Dissipation PD 80 W TC=25℃ 2
Storage Temperature Range TSTG -55 150 ℃ 2
Operating Junction Temperature Range TJ -55 150 ℃ 2
Thermal Resistance Junction-to-Case RθJC 1.6 ℃/W 2
Drain-Source Breakdown Voltage BVDSS 40 V VGS=0V, ID=250uA 2
Drain-Source Leakage Current IDSS 1 uA VDS=32V, VGS=0V, TJ=25℃ 2
Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 2
Gate Threshold Voltage VGS(th) 1 1.6 2.5 V VGS=VDS, ID=250uA 2
Static Drain-Source On-Resistance RDS(ON) 4.1 6 mΩ VGS=10V, ID=20A 2
Static Drain-Source On-Resistance RDS(ON) 5 7 mΩ VGS=4.5V, ID=20A 2
Diode Forward Voltage VSD 1.2 V VGS=0V, IS=1A, TJ=25℃ 2
Maximum Body-Diode Continuous Current IS 85 A 2

CAD (KiCad official)

  • Symbol: SP40N04TH
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252-2L (KiCad packages3D, STEP)
  • 3D model files: sp40n04th-etched.step / sp40n04th-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp40n04th.step / sp40n04th.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Siliup datasheet (5 pp, sha256 4d1293e12e845871, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF