component
SP3415KT2
Public Made by Adomby adom
Siliup MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SP3415KT2
Siliup · MOSFETs · SOT-23
SP3415KT2 from Siliup, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±10 V (VGSS), threshold VGS(th) -0.4 to -1.0 V at ID=-250µA, ESD protected 2KV. |
| 2 | S | passive | Source of the P-channel MOSFET; drain-source voltage -20 V max and continuous drain current -6 A. |
| 3 | D | passive | Drain of the P-channel MOSFET; VDSS -20 V, continuous ID -6 A, pulsed IDM -24 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
SP3415KT2 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
sp3415kt2-etched.step/sp3415kt2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sp3415kt2.step/sp3415kt2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Siliup datasheet (5 pp, sha256
618c5582c89419c1, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SP3415KT2
**Siliup** · MOSFETs · SOT-23
SP3415KT2 from Siliup, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±10 V (VGSS), threshold VGS(th) -0.4 to -1.0 V at ID=-250µA, ESD protected 2KV. |
| 2 | S | passive | Source of the P-channel MOSFET; drain-source voltage -20 V max and continuous drain current -6 A. |
| 3 | D | passive | Drain of the P-channel MOSFET; VDSS -20 V, continuous ID -6 A, pulsed IDM -24 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## CAD (KiCad official)
- Symbol: `SP3415KT2`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `sp3415kt2-etched.step` / `sp3415kt2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sp3415kt2.step` / `sp3415kt2.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Siliup datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604429482976047104) (5 pp, sha256 `618c5582c89419c1`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sp3415kt2-datasheet.pdf)