component
SP2319T2
Public Made by Adomby adom
Siliup MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
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| viewers | 3h ago |
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| page.json | 3h ago |
| README.md | 3h ago |
| sp2319t2-etched.glb | 3h ago |
| sp2319t2-etched.step | 3h ago |
| sp2319t2-hero.glb | 3h ago |
| sp2319t2-hero.overlay.json | 3h ago |
| sp2319t2.glb | 3h ago |
| sp2319t2.kicad_mod | 3h ago |
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| sp2319t2.lbr | 3h ago |
| sp2319t2.step | 3h ago |
SP2319T2
Siliup · MOSFETs · SOT-23
SP2319T2 from Siliup, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±20 V, with threshold VGS(th) of -1.0 to -2.5 V at ID=-250µA. |
| 2 | S | passive | Source of the P-channel MOSFET; the body diode forward voltage is max -1.2 V at IS=-1A. |
| 3 | D | passive | Drain; drain-source voltage rated -40 V with continuous drain current of -3.2 A and pulsed -12.8 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -40 | V | VGS=0V , ID=-250µA | 2 | ||
| Gate Threshold Voltage | VGS(th) | -1 | -1.5 | -2.5 | V | VDS=VGS , ID=-250µA | 2 |
| Static Drain-Source On-Resistance (VGS=-10V, ID=-3A) | RDS(ON) | 65 | 85 | mΩ | VGS=-10V , ID =-3A | 2 | |
| Static Drain-Source On-Resistance (VGS=-4.5V, ID=-2A) | RDS(ON) | 85 | 100 | mΩ | VGS=-4.5V , ID =-2A | 2 | |
| Drain-Source Leakage Current | IDSS | -1 | uA | VDS=-32V , VGS=0V | 2 | ||
| Gate-Source Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V , VDS=0V | 2 | |
| Diode Forward Voltage | VSD | -1.2 | V | VGS=0V , IS=-1A , TJ=25℃ | 2 | ||
| Drain-Source Voltage | VDSS | -40 | V | 2 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Continuous Drain Current | ID | -3.2 | A | 2 | |||
| Pulse Drain Current Tested | IDM | -12.8 | A | 2 | |||
| Power Dissipation | PD | 0.9 | W | 2 | |||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 2 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | °C | 2 | ||
| Thermal Resistance Junction-to-Ambient | RθJA | 138.8 | °C/W | 2 |
CAD (KiCad official)
- Symbol:
SP2319T2 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
sp2319t2-etched.step/sp2319t2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sp2319t2.step/sp2319t2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Siliup datasheet (5 pp, sha256
e7b1942179c95fbf, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).