component
SP2302DTS
Public Made by Adomby adom
Siliup MOSFETs, SOT-23-6L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SP2302DTS
Siliup · MOSFETs · SOT-23-6L
SP2302DTS from Siliup, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G1 | input | Gate of MOSFET 1; gate-source voltage limited to ±12 V with threshold of 0.4 to 1.0 V. |
| 2 | S2 | passive | Source of MOSFET 2, shown on the circuit diagram as joined to the source of MOSFET 1 (S1, pin 5); drain-source voltage rated 20 V. |
| 3 | G2 | input | Gate of MOSFET 2; gate-source voltage limited to ±12 V with threshold of 0.4 to 1.0 V. |
| 4 | D2 | passive | Drain of MOSFET 2; drain-source voltage rated 20 V and continuous drain current 4 A. |
| 5 | S1 | passive | Source of MOSFET 1, shown on the circuit diagram as joined to the source of MOSFET 2 (S2, pin 2); drain-source voltage rated 20 V. |
| 6 | D1 | passive | Drain of MOSFET 1; drain-source voltage rated 20 V and continuous drain current 4 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23-6L |
| Category | Transistors/Thyristors |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
SP2302DTS - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files:
sp2302dts-etched.step/sp2302dts-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sp2302dts.step/sp2302dts.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Siliup datasheet (5 pp, sha256
9328501c1e6b595d, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SP2302DTS
**Siliup** · MOSFETs · SOT-23-6L
SP2302DTS from Siliup, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G1 | input | Gate of MOSFET 1; gate-source voltage limited to ±12 V with threshold of 0.4 to 1.0 V. |
| 2 | S2 | passive | Source of MOSFET 2, shown on the circuit diagram as joined to the source of MOSFET 1 (S1, pin 5); drain-source voltage rated 20 V. |
| 3 | G2 | input | Gate of MOSFET 2; gate-source voltage limited to ±12 V with threshold of 0.4 to 1.0 V. |
| 4 | D2 | passive | Drain of MOSFET 2; drain-source voltage rated 20 V and continuous drain current 4 A. |
| 5 | S1 | passive | Source of MOSFET 1, shown on the circuit diagram as joined to the source of MOSFET 2 (S2, pin 2); drain-source voltage rated 20 V. |
| 6 | D1 | passive | Drain of MOSFET 1; drain-source voltage rated 20 V and continuous drain current 4 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-23-6L |
| Category | Transistors/Thyristors |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `SP2302DTS`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files: `sp2302dts-etched.step` / `sp2302dts-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sp2302dts.step` / `sp2302dts.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Siliup datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604428804530327552) (5 pp, sha256 `9328501c1e6b595d`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sp2302dts-datasheet.pdf)