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docs sp202een-l: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sp202een-l: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
README.md sp202een-l: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sp202een-l-etched.fit.json sp202een-l: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sp202een-l-etched.glb sp202een-l: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
sp202een-l-etched.step sp202een-l: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
sp202een-l.glb Publish 0.1.0 · Ray
sp202een-l.kicad_mod Publish 0.1.0 · Ray
sp202een-l.kicad_sym Publish 0.1.0 · Ray
sp202een-l.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sp202een-l.step Publish 0.1.0 · Ray

SP202EEN-L

MaxLinear · RS232 ICs · SOIC-16

SP202EEN-L from MaxLinear, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C1+ passive Positive terminal of the charge-pump flying capacitor C1 (typ. 0.1uF ceramic). Used in charge-pump Phase 1 to double VCC.
2 V+ power_out Regulated positive charge-pump output (nominally +6V). Bypass to GND with a 0.1uF ceramic reservoir capacitor. Supplies the internal RS-232 driver positive rail.
3 C1- passive Negative terminal of the charge-pump flying capacitor C1 (typ. 0.1uF ceramic).
4 C2+ passive Positive terminal of the charge-pump flying capacitor C2 (typ. 0.1uF ceramic). Used by the inverting charge pump to develop V-.
5 C2- passive Negative terminal of the charge-pump flying capacitor C2 (typ. 0.1uF ceramic).
6 V- power_out Regulated negative charge-pump output (nominally -6V). Bypass to GND with a 0.1uF ceramic reservoir capacitor. Supplies the internal RS-232 driver negative rail.
7 T2OUT output Driver 2 RS-232 line output. Inverted level-shifted version of T2IN; swings between V- and V+ (typ. +/-6V, guaranteed +/-5.0V min into 3kohm/2500pF). Short-circuit protected.
8 R2IN input Receiver 2 RS-232 line input. Accepts +/-15V RS-232 signals; typical thresholds 1.2V/1.7V with 500mV hysteresis. Internal ~5kohm pull-down commits an unconnected input to a HIGH output.
9 R2OUT output Receiver 2 TTL/CMOS logic output. Inverted logic-level version of R2IN. VOL <= 0.4V @ 3.2mA, VOH >= 3.5V @ -1mA.
10 T2IN input Driver 2 TTL/CMOS logic input. Thresholds 0.8V LOW / 2.0V HIGH; internal pull-up (~15uA typ). Drives T2OUT to the inverted RS-232 level.
11 T1IN input Driver 1 TTL/CMOS logic input. Thresholds 0.8V LOW / 2.0V HIGH; internal pull-up (~15uA typ). Drives T1OUT to the inverted RS-232 level.
12 R1OUT output Receiver 1 TTL/CMOS logic output. Inverted logic-level version of R1IN. VOL <= 0.4V @ 3.2mA, VOH >= 3.5V @ -1mA.
13 R1IN input Receiver 1 RS-232 line input. Accepts +/-15V RS-232 signals; typical thresholds 1.2V/1.7V with 500mV hysteresis. Internal ~5kohm pull-down commits an unconnected input to a HIGH output.
14 T1OUT output Driver 1 RS-232 line output. Inverted level-shifted version of T1IN; swings between V- and V+ (typ. +/-6V, guaranteed +/-5.0V min into 3kohm/2500pF). Short-circuit protected.
15 GND power_in Device ground reference. All RS-232 and TTL signals are referenced to this pin.
16 VCC power_in Primary +5V logic and charge-pump supply (4.5-5.5V nominal, 6.0V absolute max). Typical ICC = 3mA no-load, 15mA when all transmitters loaded at 3kohm. Bypass with 0.1uF to GND.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package SOIC-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • SP202EEN-L
  • SP202EEN-L/TR
  • SP202ECN-L
  • SP202ECN-L/TR
  • SP202EET-L/TR
  • SP202ECT-L
  • SP202ECT-L/TR

CAD (KiCad official)

  • Symbol: SP202EEN-L
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sp202een-l-etched.step / sp202een-l-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp202een-l.step / sp202een-l.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sp202een-l.step 217 KB You want the bare part, or you mark your own boards.
sp202een-l-etched.step 2.3 MB You want the part with SP202EEN-L already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 578 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (19 pp, sha256 942adc867fc83cd3, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF