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Ray Publish 0.1.0 5619ab2 20d ago

SP2024KCTW

Siliup · MOSFETs · SOT-363

SP2024KCTW from Siliup, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of N-channel MOSFET Q1 (20V, 0.75A continuous drain current, VGS ±12V max).
2 G1 input Gate of N-channel MOSFET Q1, ESD protected to HBM 2kV, VGS ±12V max with threshold 0.35 to 1V.
3 D2 passive Drain of P-channel MOSFET Q2 (-20V, -0.66A continuous drain current).
4 S2 passive Source of P-channel MOSFET Q2 (-20V, -0.66A continuous drain current, VGS ±10V max).
5 G2 input Gate of P-channel MOSFET Q2, ESD protected to HBM 2kV, VGS ±10V max with threshold -0.35 to -1.0V.
6 D1 passive Drain of N-channel MOSFET Q1 (20V, 0.75A continuous drain current).

Key specifications

Parameter Value
Manufacturer Siliup
Package SOT-363
Category Transistors/Thyristors
Pins 6

CAD (KiCad official)

  • Symbol: SP2024KCTW
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: sp2024kctw-etched.step / sp2024kctw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp2024kctw.step / sp2024kctw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Siliup datasheet (6 pp, sha256 50738446dc33c28b, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF