component
SP2006KT5
Public Made by Adomby adom
Siliup MOSFETs, SOT-523. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7d ago |
| viewers | 7d ago |
| package.json | 7d ago |
| page.json | 7d ago |
| README.md | 7d ago |
| sp2006kt5-etched.glb | 7d ago |
| sp2006kt5-etched.step | 7d ago |
| sp2006kt5-hero.glb | 7d ago |
| sp2006kt5-hero.overlay.json | 7d ago |
| sp2006kt5.glb | 7d ago |
| sp2006kt5.kicad_mod | 7d ago |
| sp2006kt5.kicad_sym | 7d ago |
| sp2006kt5.lbr | 7d ago |
| sp2006kt5.step | 7d ago |
SP2006KT5
Siliup · MOSFETs · SOT-523
SP2006KT5 from Siliup, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the P-channel MOSFET, with absolute maximum VGSS of ±12 V, threshold VGS(th) of -0.35 to -1.00 V, and 2 kV ESD protection. |
| 2 | S | passive | Source; the source terminal of the P-channel MOSFET, with continuous drain current ID of -0.66 A. |
| 3 | D | passive | Drain; the drain terminal of the P-channel MOSFET, with absolute maximum VDSS of -20 V and pulsed drain current IDM of -2.64 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOT-523 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -20 | V | 2 | |||
| Gate-Source Voltage | VGSS | -12 | 12 | V | 2 | ||
| Continuous Drain Current | ID | -0.66 | A | 2 | |||
| Pulse Drain Current Tested | IDM | -2.64 | A | 2 | |||
| Power Dissipation | PD | 150 | mW | 2 | |||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 2 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | °C | 2 | ||
| Thermal Resistance Junction-to-Ambient | RθJA | 833 | °C/W | 2 | |||
| Drain-Source Breakdown Voltage | BVDSS | -20 | V | VGS=0V, ID=-250µA | 2 | ||
| Drain-Source Leakage Current | IDSS | -1 | uA | VDS=-16V, VGS=0V | 2 | ||
| Gate-Source Leakage Current | IGSS | -10 | 10 | uA | VGS=±12V, VDS=0V | 2 | |
| Gate Threshold Voltage | VGS(th) | -0.35 | -0.65 | -1 | V | VDS=VGS, ID=-250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | 650 | 750 | mΩ | VGS=-4.5V, ID=-500mA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 850 | 1000 | mΩ | VGS=-2.5V, ID=-200mA | 2 | |
| Diode Forward Voltage | VSD | -1.2 | V | VGS=0V, IS=-1A, TJ=25℃ | 2 |
CAD (KiCad official)
- Symbol:
SP2006KT5 - Footprint:
Package_TO_SOT_SMD:SOT-523 - 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
sp2006kt5-etched.step/sp2006kt5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sp2006kt5.step/sp2006kt5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Siliup datasheet (5 pp, sha256
51cf9255a5e45e4b, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).