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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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SP2002KT5J

Siliup · MOSFETs · SOT-523

SP2002KT5J from Siliup, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; ESD-protected gate with VGS rated ±12 V absolute maximum and threshold of 0.3 V min to 1 V max at ID=250µA.
2 S passive Source terminal of the N-channel MOSFET, with continuous drain current rated 0.75 A.
3 D passive Drain terminal, with VDS rated 20 V maximum and pulsed drain current of 1.8 A.

Key specifications

Parameter Value
Manufacturer Siliup
Package SOT-523
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: SP2002KT5J
  • Footprint: Package_TO_SOT_SMD:SOT-523
  • 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: sp2002kt5j-etched.step / sp2002kt5j-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp2002kt5j.step / sp2002kt5j.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Siliup datasheet (4 pp, sha256 bbec78ba0f24c9c3, retrieved 2026-10-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF