# SP1049CP8

**Siliup** · MOSFETs · SOP-8

SP1049CP8 from Siliup, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of the first (N-channel, 100V, 6A) MOSFET, per the circuit diagram. |
| 2 | G1 | input | Gate of the first (N-channel) MOSFET, with a VGS limit of ±20V. |
| 3 | S2 | passive | Source of the second (P-channel, -100V, -6A) MOSFET, per the circuit diagram. |
| 4 | G2 | input | Gate of the second (P-channel) MOSFET, with a VGS limit of ±20V. |
| 5 | D2 | passive | Drain of the second (P-channel) MOSFET, tied to pin 6, rated VDS -100V and ID -6A. |
| 6 | D2 | passive | Drain of the second (P-channel) MOSFET, tied to pin 5, rated VDS -100V and ID -6A. |
| 7 | D1 | passive | Drain of the first (N-channel) MOSFET, tied to pin 8, rated VDS 100V and ID 6A. |
| 8 | D1 | passive | Drain of the first (N-channel) MOSFET, tied to pin 7, rated VDS 100V and ID 6A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Siliup |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage (N-Channel) | VDS |  |  | 100 | V | N-Channel | 2 |
| Drain-Source Voltage (P-Channel) | VDS |  |  | -100 | V | P-Channel | 2 |
| Gate-Source Voltage (N-Channel) | VGS | -20 |  | 20 | V | N-Channel | 2 |
| Gate-Source Voltage (P-Channel) | VGS | -20 |  | 20 | V | P-Channel | 2 |
| Continuous Drain Current (N-Channel) | ID |  |  | 6 | A | N-Channel | 2 |
| Continuous Drain Current (P-Channel) | ID |  |  | -6 | A | P-Channel | 2 |
| Pulsed Drain Current (N-Channel) | IDM |  |  | 24 | A | N-Channel | 2 |
| Pulsed Drain Current (P-Channel) | IDM |  |  | -24 | A | P-Channel | 2 |
| Single Pulse Avalanche Energy (N-Channel) | EAS |  |  | 10.5 | mJ | Note 1: VDD=50V, VGS=10V, L=0.5mH, RG=25Ω | 2 |
| Single Pulse Avalanche Energy (P-Channel) | EAS |  |  | 24 | mJ | Note 1: VDD=-50V, VGS=-10V, L=0.5mH, RG=25Ω | 2 |
| Power Dissipation | PD |  |  | 2.5 | W |  | 2 |
| Thermal Resistance Junction-to-Ambient | RθJA |  |  | 50 | ℃/W |  | 2 |
| Storage Temperature Range | TSTG | -55 |  | 150 | ℃ |  | 2 |
| Operating Junction Temperature Range | TJ | -55 |  | 150 | ℃ |  | 2 |
| Drain-Source Breakdown Voltage (N-Channel) | BVDSS | 100 |  |  | V | VGS=0V, ID=250uA | 2 |
| Drain-Source Leakage Current (N-Channel) | IDSS |  |  | 1 | uA | VDS=80V, VGS=0V, TJ=25℃ | 2 |
| Gate-Source Leakage Current (N-Channel) | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Gate Threshold Voltage (N-Channel) | VGS(th) | 1 | 1.5 | 2.5 | V | VGS=VDS, ID=250uA | 2 |
| Static Drain-Source On-Resistance (N-Channel) | RDS(ON) |  | 40 | 50 | mΩ | VGS=10V, ID=5A | 2 |
| Static Drain-Source On-Resistance (N-Channel) | RDS(ON) |  | 45 | 60 | mΩ | VGS=4.5V, ID=3A | 2 |
| Diode Forward Voltage (N-Channel) | VSD |  |  | 1.2 | V | VGS=0V, IS=1A, TJ=25℃ | 2 |
| Maximum Body-Diode Continuous Current (N-Channel) | IS |  |  | 6 | A |  | 2 |
| Drain-Source Breakdown Voltage (P-Channel) | BVDSS | -100 |  |  | V | VGS=0V, ID=-250uA | 3 |
| Drain-Source Leakage Current (P-Channel) | IDSS |  |  | -1 | uA | VDS=-80V, VGS=0V, TJ=25℃ | 3 |
| Gate-Source Leakage Current (P-Channel) | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 3 |
| Gate Threshold Voltage (P-Channel) | VGS(th) | -1 | -1.8 | -2.5 | V | VGS=VDS, ID=-250uA | 3 |
| Static Drain-Source On-Resistance (P-Channel) | RDS(ON) |  | 90 | 115 | mΩ | VGS=-10V, ID=-5A | 3 |
| Static Drain-Source On-Resistance (P-Channel) | RDS(ON) |  | 100 | 135 | mΩ | VGS=-4.5V, ID=-3A | 3 |
| Diode Forward Voltage (P-Channel) | VSD |  |  | -1.2 | V | VGS=0V, IS=-1A, TJ=25℃ | 3 |
| Maximum Body-Diode Continuous Current (P-Channel) | IS |  |  | -6 | A |  | 3 |

## CAD (KiCad official)

- Symbol: `SP1049CP8`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `sp1049cp8-etched.step` / `sp1049cp8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sp1049cp8.step` / `sp1049cp8.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Siliup datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603376819500969984) (8 pp, sha256 `d97919c3ba709a55`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sp1049cp8-datasheet.pdf)