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Contents

README

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SP010N07AGTH

Siliup · MOSFETs · TO-252

SP010N07AGTH from Siliup, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; controls the channel, with VGS rated ±20 V maximum and threshold of 1.3 to 2.3 V at ID=250uA.
2 D passive Drain; rated for VDS of 100 V and continuous drain current of 80 A at Tc=25℃ (320 A pulsed).
3 S passive Source; body-diode continuous current up to 80 A with forward voltage of 1.2 V max at IS=1A.

Key specifications

Parameter Value
Manufacturer Siliup
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 100 V Ta=25℃ 2
Gate-Source Voltage VGS -20 20 V Ta=25℃ 2
Continuous Drain Current ID 80 A Tc=25℃ 2
Continuous Drain Current ID 53 A Tc=100℃ 2
Pulsed Drain Current IDM 320 A 2
Single Pulse Avalanche Energy EAS 272 mJ VDD=50V, VGS=10V, L=0.5mH, RG=25Ω 2
Power Dissipation PD 100 W Tc=25℃ 2
Power Dissipation PD 40 W Tc=100℃ 2
Thermal Resistance Junction-to-Case RθJC 1.25 ℃/W 2
Storage Temperature Range TSTG -55 150 ℃ 2
Operating Junction Temperature Range TJ -55 150 ℃ 2
Drain-Source Breakdown Voltage BVDSS 100 V VGS=0V, ID=250uA 2
Drain Cut-Off Current IDSS 1 μA VDS=80V, VGS=0V, TJ=25℃ 2
Gate Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 2
Gate Threshold Voltage VGS(th) 1.3 1.7 2.3 V VGS=VDS, ID=250uA 2
Drain-Source ON Resistance RDS(ON) 7.1 8.9 mΩ VGS=10V, ID=30A 2
Drain-Source ON Resistance RDS(ON) 9.5 12.5 mΩ VGS=4.5V, ID=25A 2
Source-Drain Diode Forward Voltage VSD 1.2 V IS=1A, VGS=0V, TJ=25℃ 2
Maximum Body-Diode Continuous Current IS 80 A 2
Gate Resistance RG 3.1 Ω VDS=50V, VGS=0V, f=1MHz 2
Input Capacitance Ciss 1780 pF VDS=50V, VGS=0V, f=1MHz 2
Output Capacitance Coss 820 pF VDS=50V, VGS=0V, f=1MHz 2
Reverse Transfer Capacitance Crss 12 pF VDS=50V, VGS=0V, f=1MHz 2
Total Gate Charge Qg 29 nC VDS=50V, VGS=10V, ID=30A 2
Gate-Source Charge Qgs 6 nC VDS=50V, VGS=10V, ID=30A 2
Gate-Drain Charge Qgd 8 nC VDS=50V, VGS=10V, ID=30A 2
Gate Plateau Voltage Vplateau 3.3 V VDS=50V, VGS=10V, ID=30A 2
Turn-On Delay Time td(on) 12 nS VDD=50V, VGS=10V, RG=2.7Ω, ID=30A 2
Rise Time tr 40 nS VDD=50V, VGS=10V, RG=2.7Ω, ID=30A 2
Turn-Off Delay Time td(off) 30 nS VDD=50V, VGS=10V, RG=2.7Ω, ID=30A 2
Fall Time tf 11 nS VDD=50V, VGS=10V, RG=2.7Ω, ID=30A 2
Reverse Recovery Time Trr 55 nS IS=20A, di/dt=100A/us, TJ=25℃ 2
Reverse Recovery Charge Qrr 90 nC IS=20A, di/dt=100A/us, TJ=25℃ 2

CAD (KiCad official)

  • Symbol: SP010N07AGTH
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: sp010n07agth-etched.step / sp010n07agth-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp010n07agth.step / sp010n07agth.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Siliup datasheet (9 pp, sha256 3e07a03a00a4d560, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF