component
SN75LVCP412ARTJR
Public Made by Adomby adom
Texas Instruments Signal Buffers, Repeaters, Splitters, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN75LVCP412ARTJR
Texas Instruments · Signal Buffers, Repeaters, Splitters · QFN-20-EP(4x4)
SN75LVCP412ARTJR from Texas Instruments, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RX_1P | input | Non-inverting CML differential input for channel 1, internally biased through the dual termination circuit (ZDiffRX 85 to 100 to 115 Ω). |
| 2 | RX_1N | input | Inverting CML differential input for channel 1, internally biased through the dual termination circuit (ZDiffRX 85 to 100 to 115 Ω). |
| 3 | GND | power_in | Supply ground. |
| 4 | TX_2N | output | Inverting CML differential output for channel 2, internally tied to voltage bias through termination resistors. |
| 5 | TX_2P | output | Non-inverting CML differential output for channel 2, internally tied to voltage bias through termination resistors. |
| 6 | VCC | power_in | Positive supply, 3.3 V ±10% (3.0 V to 3.6 V recommended operating range). |
| 7 | EN | input | LVCMOS device enable, internally pulled up to VCC; driving it low (VIL max 0.5 V) puts the device in standby, with outputs Hi-Z, within 2 µs max. |
| 8 | PE2 | input | LVCMOS control selecting channel 2 output pre-emphasis (0 dB or 2.5 dB) per Table 2; internally pulled down to GND. |
| 9 | PE1 | input | LVCMOS control selecting channel 1 output pre-emphasis (0 dB or 2.5 dB) per Table 2; internally pulled down to GND. |
| 10 | VCC | power_in | Positive supply, 3.3 V ±10% (3.0 V to 3.6 V recommended operating range). |
| 11 | RX2P | input | Non-inverting CML differential input for channel 2, internally biased through the dual termination circuit. |
| 12 | RX2N | input | Inverting CML differential input for channel 2, internally biased through the dual termination circuit. |
| 13 | GND | power_in | Supply ground. |
| 14 | TX1N | output | Inverting CML differential output for channel 1, internally tied to voltage bias through termination resistors. |
| 15 | TX1P | output | Non-inverting CML differential output for channel 1, internally tied to voltage bias through termination resistors. |
| 16 | VCC | power_in | Positive supply, 3.3 V ±10% (3.0 V to 3.6 V recommended operating range). |
| 17 | GND | power_in | Supply ground. |
| 18 | GND | power_in | Supply ground. |
| 19 | GND | power_in | Supply ground. |
| 20 | VCC | power_in | Positive supply, 3.3 V ±10% (3.0 V to 3.6 V recommended operating range). |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-20-EP(4x4) |
| Category | Interface |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
SN75LVCP412ARTJR - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
sn75lvcp412artjr-etched.step/sn75lvcp412artjr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn75lvcp412artjr.step/sn75lvcp412artjr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
16427b526d5c8605, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).