component

SN75LBC175N

Public Made by Adom

by adom

Texas Instruments Buffers / Drivers, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn75lbc175nfactory-2.0.0extractor-text

Verified SN75LBC175N

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN75LBC175N · PDIP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 20-page datasheet
  • ✓distributor: lcsc C1499598, digikey 296-SN75LBC175N-ND, mouser 595-SN75LBC175N
  • ✓family: DIP-16_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-41tj28tl/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn75lbc175n.kicad_sym✓ sn75lbc175n.kicad_mod✓ sn75lbc175n.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 13h ago
viewers sn75lbc175n: viewers · Ray 13h ago
package.json Publish 0.1.0 · Ray 13h ago
page.json Set visibility: public · Ray 13h ago
README.md Publish 0.1.0 · Ray 13h ago
sn75lbc175n-etched.glb Publish 0.1.0 · Ray 13h ago
sn75lbc175n-etched.step sn75lbc175n: factory component page (tier=mfr) · Ray 13h ago
sn75lbc175n-hero.glb sn75lbc175n: hero GLB from the etched model (keeps the MPN mark) · Ray 13h ago
sn75lbc175n-hero.overlay.json Publish 0.1.0 · Ray 13h ago
sn75lbc175n.glb Publish 0.1.0 · Ray 13h ago
sn75lbc175n.kicad_mod Publish 0.1.0 · Ray 13h ago
sn75lbc175n.kicad_sym Publish 0.1.0 · Ray 13h ago
sn75lbc175n.lbr Publish 0.1.0 · Ray 13h ago
sn75lbc175n.step Publish 0.1.0 · Ray 13h ago
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray 13h ago

SN75LBC175N

Texas Instruments · Buffers / Drivers · PDIP-16

SN75LBC175N from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1B input Inverting differential input of receiver 1; recommended differential input voltage is ±6 V over a common-mode range of −7 V to 12 V.
2 1A input Noninverting differential input of receiver 1; sensitivity is ±200 mV over a common-mode input voltage range of −7 V to 12 V.
3 1Y output Receiver 1 output; high for VID ≥ 0.2 V, low for VID ≤ −0.2 V, high when the inputs are open-circuited, and high-impedance when disabled.
4 1,2EN input Active-high enable for receivers 1 and 2; VIH minimum 2 V and VIL maximum 0.8 V, with the outputs in high impedance when low.
5 2Y output Receiver 2 output; high for VID ≥ 0.2 V, low for VID ≤ −0.2 V, high when the inputs are open-circuited, and high-impedance when disabled.
6 2A input Noninverting differential input of receiver 2; sensitivity is ±200 mV over a common-mode input voltage range of −7 V to 12 V.
7 2B input Inverting differential input of receiver 2; recommended differential input voltage is ±6 V over a common-mode range of −7 V to 12 V.
8 GND power_in Ground reference; all voltage values are specified with respect to GND.
9 3B input Inverting differential input of receiver 3; recommended differential input voltage is ±6 V over a common-mode range of −7 V to 12 V.
10 3A input Noninverting differential input of receiver 3; sensitivity is ±200 mV over a common-mode input voltage range of −7 V to 12 V.
11 3Y output Receiver 3 output; high for VID ≥ 0.2 V, low for VID ≤ −0.2 V, high when the inputs are open-circuited, and high-impedance when disabled.
12 3,4EN input Active-high enable for receivers 3 and 4; VIH minimum 2 V and VIL maximum 0.8 V, with the outputs in high impedance when low.
13 4Y output Receiver 4 output; high for VID ≥ 0.2 V, low for VID ≤ −0.2 V, high when the inputs are open-circuited, and high-impedance when disabled.
14 4A input Noninverting differential input of receiver 4; sensitivity is ±200 mV over a common-mode input voltage range of −7 V to 12 V.
15 4B input Inverting differential input of receiver 4; recommended differential input voltage is ±6 V over a common-mode range of −7 V to 12 V.
16 VCC power_in Supply voltage, 4.75 V minimum, 5 V nominal, and 5.25 V maximum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 3
Common-mode input voltage VIC -7 12 V 3
Differential input voltage VID -6 6 V 3
High-level input voltage, EN inputs VIH 2 V 3
Low-level input voltage VIL 0.8 V 3
High-level output current IOH -8 mA 3
Low-level output current IOL 8 mA 3
Operating free-air temperature, SN75LBC175 TA 0 70 °C 3
Supply voltage VCC -0.3 7 V 3
Input voltage, A or B inputs VI -25 25 V 3
Differential input voltage VID -25 25 V 3
Voltage range at Y, 1/2EN, 3/4EN -0.3 V Upper limit printed as VCC + 0.5 V 3
Operating free-air temperature, SN75LBC175 TA 0 70 °C 3
Storage temperature range Tstg -65 150 °C 3
Electrostatic discharge, Human Body Model 1 kV HBM 3
Electrostatic discharge, Machine Model 200 V MM 3
Electrostatic discharge, Charged Device Model 1.5 kV CDM 3
Continuous total dissipation, N package 1150 mW TA ≤ 25°C 3
Power rating, N package 736 mW TA = 70°C 3
Power rating, N package 598 mW TA = 85°C 3
Positive-going input threshold voltage VIT+ 0.2 V IO = −8 mA 4
Negative-going input threshold voltage VIT− -0.2 V IO = 8 mA 4
Enable input clamp voltage VIK -0.9 -1.5 V II = −18 mA 4
High-level output voltage VOH 3.5 4.5 V VID = 200 mV, IOH = −8 mA 4
Low-level output voltage VOL 0.3 0.5 V VID = −200 mV, IOL = 8 mA 4
High-impedance-state output current IOZ -20 20 µA VO = 0 V to VCC 4
Bus input current, A or B inputs II 0.7 1 mA VIH = 12 V, VCC = 5 V, Other inputs at 0 V 4
Bus input current, A or B inputs II 0.8 1 mA VIH = 12 V, VCC = 0 V, Other inputs at 0 V 4
Bus input current, A or B inputs II -0.5 -0.8 mA VIH = −7 V, VCC = 5 V, Other inputs at 0 V 4
Bus input current, A or B inputs II -0.4 -0.8 mA VIH = −7 V, VCC = 0 V, Other inputs at 0 V 4
High-level enable input current IIH -20 20 µA VIH = 5 V 4
Low-level enable input current IIL -20 µA VIL = 0 V 4
Short-circuit output current IOS -80 -120 mA VO = 0 4
Supply current, outputs enabled ICC 11 20 mA Outputs enabled, IO = 0, VID = 5 V 4
Supply current, outputs disabled ICC 0.9 1.4 mA Outputs disabled 4
Propagation delay time, high- to low-level output tPHL 11 22 30 ns VCC = 5 V, CL = 15 pF, TA = 25°C; VID = −1.5 V to 1.5 V 4
Propagation delay time, low- to high-level output tPLH 11 22 30 ns VCC = 5 V, CL = 15 pF, TA = 25°C; VID = −1.5 V to 1.5 V, See Figure 1 4
Output enable time to high level tPZH 17 30 ns VCC = 5 V, CL = 15 pF, TA = 25°C; See Figure 2 4
Output enable time to low level tPZL 18 30 ns VCC = 5 V, CL = 15 pF, TA = 25°C; See Figure 3 4
Output disable time from high level tPHZ 30 40 ns VCC = 5 V, CL = 15 pF, TA = 25°C; See Figure 2 4
Output disable time from low level tPLZ 23 30 ns VCC = 5 V, CL = 15 pF, TA = 25°C; See Figure 3 4
Pulse skew (/tPHL − tPLH/) tsk(p) 4 6 ns VCC = 5 V, CL = 15 pF, TA = 25°C; See Figure 2 4
Transition time tt 3 10 ns VCC = 5 V, CL = 15 pF, TA = 25°C; See Figure 1 4

CAD (KiCad official)

  • Symbol: SN75LBC175N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: PDIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn75lbc175n-etched.step / sn75lbc175n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn75lbc175n.step / sn75lbc175n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 5a9ca64cd1115bbf, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF