component

SN75DP119RHHR

Public Made by Adom

by adom

Texas Instruments Video Interface ICs, VQFN-36-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentcommunication interface chip-uart-485-232sn75dp119rhhrfactory-2.0.0extractor-text

Verified SN75DP119RHHR

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 37 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN75DP119RHHR · VQFN-36-EP(6x6) · 37 pins
  • ✓copper: 37 copper pads, none touching another net
  • ✓datasheet: all 37 pin names found in the 29-page datasheet
  • ✓distributor: lcsc C2652438, digikey 296-25436-2-ND, mouser 595-SN75DP119RHHR
  • ✓family: QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-kadmhdfk/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.23)
  • ✓pads: 37 pins = 37 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 37 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn75dp119rhhr.kicad_sym✓ sn75dp119rhhr.kicad_mod✓ sn75dp119rhhr.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 19h ago
viewers sn75dp119rhhr: viewers · Ray 19h ago
package.json Publish 0.1.0 · Ray 19h ago
page.json Set visibility: public · Ray 19h ago
README.md Publish 0.1.0 · Ray 19h ago
sn75dp119rhhr-etched.glb Publish 0.1.0 · Ray 19h ago
sn75dp119rhhr-etched.step sn75dp119rhhr: factory component page (tier=mfr) · Ray 19h ago
sn75dp119rhhr-hero.glb sn75dp119rhhr: hero GLB from the etched model (keeps the MPN mark) · Ray 19h ago
sn75dp119rhhr-hero.overlay.json Publish 0.1.0 · Ray 19h ago
sn75dp119rhhr.glb Publish 0.1.0 · Ray 19h ago
sn75dp119rhhr.kicad_mod Publish 0.1.0 · Ray 19h ago
sn75dp119rhhr.kicad_sym Publish 0.1.0 · Ray 19h ago
sn75dp119rhhr.lbr Publish 0.1.0 · Ray 19h ago
sn75dp119rhhr.step Publish 0.1.0 · Ray 19h ago
verification.json Verified: Published by the parts factory: tier mfr, 37 pins · Ray 19h ago

SN75DP119RHHR

Texas Instruments · Video Interface ICs · VQFN-36-EP(6x6)

SN75DP119RHHR from Texas Instruments, in a VQFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin for the device.
2 IN0p input DisplayPort main link channel 0 differential input (100 Ω differential), accepting 0.15 to 1.4 Vpp VID at data rates up to 2.7 Gbps and AC coupled with 75 to 200 nF.
3 IN0n input DisplayPort main link channel 0 differential input (100 Ω differential), accepting 0.15 to 1.4 Vpp VID at data rates up to 2.7 Gbps and AC coupled with 75 to 200 nF.
4 VCC power_in 3.3 V supply pin (3.0 V to 3.6 V recommended), to be decoupled to ground with 1 µF and 0.1 µF capacitors.
5 IN1p input DisplayPort main link channel 1 differential input (100 Ω differential), accepting 0.15 to 1.4 Vpp VID at data rates up to 2.7 Gbps and AC coupled with 75 to 200 nF.
6 IN1n input DisplayPort main link channel 1 differential input (100 Ω differential), accepting 0.15 to 1.4 Vpp VID at data rates up to 2.7 Gbps and AC coupled with 75 to 200 nF.
7 GND power_in Ground pin for the device.
8 NC unconnected Not connected.
9 NC unconnected Not connected.
10 NC unconnected Not connected.
11 NC unconnected Not connected.
12 NC unconnected Not connected.
13 NC unconnected Not connected.
14 EN input Three-level enable input: HIGH gives normal mode with both outputs enabled, VCC/2 (floating) gives normal mode with the second output disabled, and LOW gives power-down with all outputs high-impedance.
15 EQ_CTL input Three-level input that sets the input equalizer for both channels: LOW gives 0 dB (EQ off), VCC/2 (floating) gives 3 dB, and HIGH (tied to VCC) gives 6 dB fixed EQ.
16 NC unconnected Not connected.
17 NC unconnected Not connected.
18 NC unconnected Not connected.
19 NC unconnected Not connected.
20 NC unconnected Not connected.
21 GND power_in Ground pin for the device.
22 OUT1n output DisplayPort main link channel 1 differential output (100 Ω differential) with 80 to 120 Ω differential termination and AC coupling of 75 to 200 nF.
23 OUT1p output DisplayPort main link channel 1 differential output (100 Ω differential) with 80 to 120 Ω differential termination and AC coupling of 75 to 200 nF.
24 VCC power_in 3.3 V supply pin (3.0 V to 3.6 V recommended), to be decoupled to ground with 1 µF and 0.1 µF capacitors.
25 OUT0n output DisplayPort main link channel 0 differential output (100 Ω differential) with 80 to 120 Ω differential termination and AC coupling of 75 to 200 nF.
26 OUT0p output DisplayPort main link channel 0 differential output (100 Ω differential) with 80 to 120 Ω differential termination and AC coupling of 75 to 200 nF.
27 NC unconnected Not connected.
28 NC unconnected Not connected.
29 NC unconnected Not connected.
30 NC unconnected Not connected.
31 VOD_CTL input Three-level input that selects one of three output swing amplitudes, as configured in Table 1.
32 GND power_in Ground pin for the device.
33 PRECTL input Three-level input that selects one of three output pre-emphasis levels, as configured in Table 1.
34 NC unconnected Not connected.
35 NC unconnected Not connected.
36 NC unconnected Not connected.
37 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-36-EP(6x6)
Category Communication Interface Chip/UART/485/232
Pins 37

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 3 3.3 3.6 V 5
Operating free-air temperature TA -40 85 °C 5
Low-level input voltage (3-level control pins) VIL 0.5 V 3-level control pins (EN, VOD_CTL, PRE_CTL, EQ_CTL) 5
Peak-to-peak input differential voltage, HBR VID 0.15 1.4 VPP High bit rate 5
Peak-to-peak input differential voltage, LBR VID 0.15 1.4 VPP Low bit rate 5
Data rate dR 2.7 Gbps 5
Differential output termination resistance Rtdiff 80 100 120 Ω 5
Output termination voltage (AC coupled) VOterm 0 2 V 5
Intra-pair skew at the input package pins, 2.7 Gbps input data rate tSK(in HBR) 100 ps Using 2.7 Gbps input data rate 5
Intra-pair skew at the input package pins, 1.62 Gbps input data rate tSK(in LBR) 300 ps Using 1.62 Gbps input data rate 5
Input rise and fall time tR/F 160 ps 5
Supply Voltage Range VCC -0.3 4 V 5
Control Inputs voltage range -0.3 5.5 V 5
Supply current 1 DP lane selected (worst case) ICCDP1max 16.2 21.3 mA WorstCase; EN = VCC/2 (1-lane) or VCC (2-lane); 2.7Gbps PRBS; VID = 400 mVPP; VOD = 300 mVpp, 8.5 dB pre-emp (PRE_CTL=VCC; VOD_CTL=GND); EQ_CTL = VCC (6 dB); VCC = 3.3 V (for typ) and VCC = 3.6 V (for max) 6
Supply current 2 DP lanes selected (worst case) ICCDP2max 31.7 41.4 mA WorstCase; EN = VCC (2-lane selected); 2.7Gbps PRBS; VID = 400 mVPP; VOD = 300 mVpp, 8.5 dB pre-emp (PRE_CTL=VCC; VOD_CTL=GND); EQ_CTL = VCC (6 dB); VCC = 3.3 V (for typ) and VCC = 3.6 V (for max) 6
Supply current 1 DP lane selected (worst case, 0 dB pre-emphasis) ICCDP3max 12.9 17.6 mA WorstCase; EN = VCC/2 (1-lane) or VCC (2-lane); 2.7Gbps PRBS; VID = 400 mVPP; VOD = 300 mVPP, 0 dB pre-emp (PRE_CTL = GND); VOD_CTL = VCC/2; EQ_CTL=GND (0 dB); VCC = 3.3 V (for typ) and VCC = 3.6 V (for max) 6
Supply current 2 DP lanes selected (worst case, 0 dB pre-emphasis) ICCDP4max 24.9 34.1 mA WorstCase; EN = VCC (2-lane selected); 2.7Gbps PRBS; VID = 400 mVPP; VOD = 300 mVPP, 0 dB pre-emp (PRE_CTL = GND); VOD_CTL = VCC/2; EQ_CTL=GND (0 dB); VCC = 3.3 V (for typ) and VCC = 3.6 V (for max) 6
Supply current 1 DP lane selected ICCDP1typ 14.5 mA EN = VCC/2 (1-lane) or VCC (2-lane selected); 2.7Gbps PRBS; IN/OUT; VID = 600 mVPP; (PRE_CTL=GND); VOD_CTL = VCC; VCC = 3.3 V, EQ_CTL = GND (no EQ) 6
Supply current 2 DP lanes selected ICCDP2typ 28.2 mA EN = VCC (2-lane selected); 2.7Gbps PRBS; IN/OUT; VID = 600 mVPP; (PRE_CTL=GND); VOD_CTL = VCC; VCC = 3.3 V, EQ_CTL = GND (no EQ) 6
Supply current 1 DP lane selected (no pre-emphasis) ICCDP3typ 14.5 mA EN = VCC/2 (1-lane) or VCC (2-lane selected); 2.7Gbps PRBS; no pre-emp; IN/OUT; VID = 800 mVPP; (PRE_CTL= VOD_CTL = VCC); VCC = 3.3 V, EQ_CTL = GND (no EQ) 6
Supply current 2 DP lanes selected (no pre-emphasis) ICCDP4typ 28.2 mA EN = VCC (2-lane selected); 2.7Gbps PRBS; no pre-emp; IN/OUT; VID = 800 mVPP; (PRE_CTL= VOD_CTL = VCC); VCC = 3.3 V, EQ_CTL = GND (no EQ) 6
Shutdown current (PWRDN mode) IPWRDN 25 100 µA EN = GND 6
Low-level input current IL -30 30 µA VI = 0.5 V; VCC = 3.6 V 6
High-level input current IH -30 30 µA VI = VCC, 0.5 V; Vcc = 3.6V 6
Mid-level input current IM -30 30 µA VI = VCC /2, 0.3V and VI = VCC /2 + 0.3 V; VCC = 3.6 V 6
Input bias resistance Rbias 105 125 145 kΩ See Figure 6 6
Input series resistance to biasing network RESD 2 2.4 kΩ See Figure 6 6
Driver output pre-emphasis (3.5 dB setting) VPRE(3.5) 0.9 3.5 dB VOD = VOD(0.4) at 2.7Gbps only; EQ=3dB 7
Driver output pre-emphasis (6.0 dB setting) VPRE(6.0) 3.3 6 dB VOD = VOD(0.3) or VOD(0.4) at 2.7Gbps only; EQ=3dB 7
Driver output pre-emphasis (8.5 dB setting) VPRE(8.5) 7 8.5 dB VOD = VOD(0.3) at 2.7Gbps only; EQ=3dB 7
Differential input termination impedance RIN 80 100 120 Ω 7
Input termination voltage (AC coupled) VItem 0 1.7 2 V Self-biased 7
Output common mode voltage VOCM 0 1.55 2 V 7
Differential output edge rate (20%-80%) tR/F(DP) 50 155 ps All VOD options, Measured at TP1, PRBS7; VID = 300 mVPP; EQ = 3dB; CLOAD = 1 pF 7
Propagation delay time tPD 325 550 ps 7
Part-to-Part skew tskpp 0 160 ps With identical voltage and temperature 7
Intra-pair output skew tSK(1) 20 ps Signal input skew = 0ps; dR = 2.7Gbps, No Pre-emphasis, 800 mVp-p, D10.2 pattern 7
Inter-pair output skew tSK(2) 100 ps 7
Peak-to-peak output residual jitter ΔtDPJIT(PP) 15 ps VOD(0.4); VPRE(0.0); Δtjit = tjit(output), tjit(input); verified through design simulation and statistical measurements only using 1.62Gbps and 2.7Gbps PRBS7 data pattern 7
Junction-to-ambient thermal resistance (RHH 36 pins) RθJA 34 °C/W 6
Junction-to-case (top) thermal resistance (RHH 36 pins) RθJC(top) 20 °C/W 6
Junction-to-board thermal resistance (RHH 36 pins) RθJB 17 °C/W 6
Junction-to-case (bottom) thermal resistance (RHH 36 pins) RθJC(bot) 12 °C/W 6

CAD (KiCad official)

  • Symbol: SN75DP119RHHR
  • Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • 3D model: VQFN-36-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: sn75dp119rhhr-etched.step / sn75dp119rhhr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn75dp119rhhr.step / sn75dp119rhhr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 124cae6b3b3ea46a, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF