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SN75ALS192N
Public Made by Adomby adom
Texas Instruments RS-485/RS-422 ICs, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN75ALS192N
Texas Instruments · RS-485/RS-422 ICs · PDIP-16
SN75ALS192N from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Driver 1 data input, TTL compatible with high-impedance input (high-level input current under 1 µA typical per description, 20 µA max at 2.7 V). |
| 2 | 1Y | tri_state | Driver 1 non-inverting differential line output, 3-state, high impedance when disabled. |
| 3 | 1Z | tri_state | Driver 1 inverting differential line output, 3-state, high impedance when disabled. |
| 4 | G | input | Active-high output-enable input for drivers 1 and 2; outputs are enabled when G is high or the complementary enable (pin 12) is low. |
| 5 | 2Z | tri_state | Driver 2 inverting differential line output, 3-state, high impedance when disabled. |
| 6 | 2Y | tri_state | Driver 2 non-inverting differential line output, 3-state, high impedance when disabled. |
| 7 | 2A | input | Driver 2 data input, TTL compatible with high-impedance input. |
| 8 | GND | power_in | Ground, network ground reference for all voltages. |
| 9 | 3A | input | Driver 3 data input, TTL compatible with high-impedance input. |
| 10 | 3Y | tri_state | Driver 3 non-inverting differential line output, 3-state, high impedance when disabled. |
| 11 | 3Z | tri_state | Driver 3 inverting differential line output, 3-state, high impedance when disabled. |
| 12 | ~{G} | input | Active-low complementary output-enable input; outputs are enabled when this pin is low or G (pin 4) is high. |
| 13 | 4Z | tri_state | Driver 4 inverting differential line output, 3-state, high impedance when disabled. |
| 14 | 4Y | tri_state | Driver 4 non-inverting differential line output, 3-state, high impedance when disabled. |
| 15 | 4A | input | Driver 4 data input, TTL compatible with high-impedance input. |
| 16 | VCC | power_in | Single 5-V supply, recommended 4.75 V to 5.25 V, absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-16 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.75 | 5 | 5.25 | V | 3 | |
| High level input voltage | VIH | 2 | V | 3 | |||
| Low-level input voltage | VIL | 0.8 | V | 3 | |||
| High-level output current | IOH | -20 | mA | 3 | |||
| Low-level output current | IOL | 20 | mA | 3 | |||
| Operating free-air temperature | TA | 0 | 70 | °C | 3 | ||
| Input clamp voltage | VIK | -1.5 | V | VCC = MIN, II = -18 mA | 4 | ||
| High-level output voltage | VOH | 2.5 | V | VCC = MIN, IOH = -20 mA | 4 | ||
| Low-level output voltage | VOL | 0.5 | V | VCC = MIN, IOL = 20 mA | 4 | ||
| Output voltage | VO | 0 | 6 | V | VCC = MAX, IO = 0 | 4 | |
| Differential output voltage | /VOD1/ | 1.5 | 6 | V | VCC = MIN, IO = 0 | 4 | |
| Differential output voltage | /VOD2/ | 2 | V | RL = 100 Ω, See Figure 1 (1/2 VOD1 or 2 V, whichever is greater) | 4 | ||
| Change in magnitude of differential output voltage | ∆/VOD/ | -0.2 | 0.2 | V | RL = 100 Ω, See Figure 1 | 4 | |
| Common-mode output voltage | VOC | -3 | 3 | V | RL = 100 Ω, See Figure 1 | 4 | |
| Change in magnitude of common-mode output voltage | ∆/VOC/ | -0.2 | 0.2 | V | RL = 100 Ω, See Figure 1 | 4 | |
| Output current with power off | IO | 100 | µA | VCC = 0, VO = 6 V | 4 | ||
| Output current with power off | IO | -100 | µA | VCC = 0, VO = -0.25 V | 4 | ||
| Off-state output current | IOZ | -20 | µA | VCC = MAX, VO = 0.5 V | 4 | ||
| Off-state output current | IOZ | 20 | µA | VCC = MAX, VO = 2.5 V | 4 | ||
| Input current at maximum input voltage | II | 100 | µA | VCC = MAX, VI = 7 V | 4 | ||
| High-level input current | IIH | 20 | µA | VCC = MAX, VI = 2.7 V | 4 | ||
| Low-level input current | IIL | -200 | µA | VCC = MAX, VI = 0.4 V | 4 | ||
| Short-circuit output current | IOS | -150 | -30 | mA | VCC = MAX | 4 | |
| Supply current (all drivers) | ICC | 26 | 45 | mA | VCC = MAX, All outputs disabled | 4 | |
| Propagation delay time, low-to-high-level output | tPLH | 6 | 13 | ns | S1 and S2 open, CL = 30 pF, VCC = 5 V, TA = 25°C | 4 | |
| Propagation delay time, high-to-low-level output | tPHL | 9 | 14 | ns | S1 and S2 open, CL = 30 pF, VCC = 5 V, TA = 25°C | 4 | |
| Output-to-output skew | 3 | 6 | ns | S1 and S2 open, CL = 30 pF, VCC = 5 V, TA = 25°C | 4 | ||
| Output enable time to high level | tPZH | 11 | 15 | ns | S1 open and S2 closed, VCC = 5 V, TA = 25°C | 4 | |
| Output enable time to low level | tPZL | 16 | 20 | ns | S1 closed and S2 open, VCC = 5 V, TA = 25°C | 4 | |
| Output disable time from high level | tPHZ | 8 | 15 | ns | S1 open and S2 closed, CL = 10 pF, VCC = 5 V, TA = 25°C | 4 | |
| Output disable time from low level | tPLZ | 18 | 20 | ns | S1 and S2 closed, CL = 10 pF, VCC = 5 V, TA = 25°C | 4 | |
| Supply voltage | VCC | 7 | V | See Note 1 | 3 | ||
| Input voltage | VI | 7 | V | 3 | |||
| Off-state output voltage | 6 | V | 3 | ||||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Lead temperature | 260 | °C | 1,6 mm (1/16 inch) from case for 10 seconds | 3 | |||
| Continuous total dissipation, N package | 1150 | mW | TA ≤ 25°C, N package; derate 9.2 mW/°C above 25°C; 736 mW at TA = 70°C | 3 |
CAD (KiCad official)
- Symbol:
SN75ALS192N - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: PDIP-16 (KiCad packages3D, STEP)
- 3D model files:
sn75als192n-etched.step/sn75als192n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn75als192n.step/sn75als192n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
ce37cf0e8f9a230e, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).