SN75372DR

{
  "slug": "sn75372dr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "motor driver ics",
    "sn75372dr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn75372dr.kicad_sym",
    "sn75372dr.kicad_mod",
    "sn75372dr.glb",
    "sn75372dr.step",
    "sn75372dr.lbr",
    "docs/hero.png",
    "docs/sn75372dr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn75372dr-hero.glb",
    "sn75372dr-hero.overlay.json"
  ],
  "component": {
    "mpn": "SN75372DR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Motor Driver ICs",
    "subcategory": "Gate Drivers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn75372.pdf",
    "parts": {
      "symbol": "sn75372dr.kicad_sym",
      "footprint": "sn75372dr.kicad_mod",
      "model_3d": "sn75372dr-hero.glb",
      "model_3d_plain": "sn75372dr.glb",
      "model_3d_step": "sn75372dr-etched.step",
      "model_3d_step_plain": "sn75372dr.step",
      "lbr": "sn75372dr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2677043",
      "digikey": "296-14958-2-ND",
      "mouser": "595-SN75372DR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T16:08:28Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-14958-2-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-SN75372DR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "NAND input A for driver 1, with VIH of 2 V minimum and VIL of 0.8 V maximum; IIL is −1.6 mA maximum at 0.4 V."
      },
      {
        "number": "2",
        "name": "E",
        "type": "input",
        "description": "Enable input shown in the schematic as common to both drivers, with VIH of 2 V minimum and VIL of 0.8 V maximum; IIL is −3.2 mA maximum at 0.4 V."
      },
      {
        "number": "3",
        "name": "2A",
        "type": "input",
        "description": "NAND input A for driver 2, with VIH of 2 V minimum and VIL of 0.8 V maximum; IIL is −1.6 mA maximum at 0.4 V."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Network ground; all datasheet voltages are referenced to network GND."
      },
      {
        "number": "5",
        "name": "VCC2",
        "type": "power_in",
        "description": "Output-stage supply, 4.75 V to 24 V recommended, with a 25 V absolute maximum."
      },
      {
        "number": "6",
        "name": "2Y",
        "type": "output",
        "description": "Totem-pole output of driver 2, with a peak output current of 500 mA (tw < 10 ms, duty cycle < 50%) and a continuous IOL of 40 mA maximum."
      },
      {
        "number": "7",
        "name": "1Y",
        "type": "output",
        "description": "Totem-pole output of driver 1, with a peak output current of 500 mA (tw < 10 ms, duty cycle < 50%) and a continuous IOL of 40 mA maximum."
      },
      {
        "number": "8",
        "name": "VCC1",
        "type": "power_in",
        "description": "5 V logic supply, 4.75 V to 5.25 V recommended, with a 7 V absolute maximum."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The SOIC-8 pin numbers were read from the top-view drawing text on page 1. Pins 1, 2, 3, 6 and 7 are; The datasheet gives no explicit pin-role table. The description for E as common to both drivers come; The 'D' SOIC package is the only 8-pin SOIC variant in this datasheet that matches SN75372DR. The PS"
        ],
        "pages_sent": 21,
        "cost_usd": 0.0755,
        "at": "2026-10-08T16:08:10"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn75372.pdf",
        "pages": 21,
        "sha256": "b087f38ca3d2e00b",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "sn75372dr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn75372dr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "0b2190edff65907e4548df8a28648b56bc57253f22ec7a0085af1d8b92ba4e12",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}