component

SN75175D

Public Made by Adom

by adom

Texas Instruments RS-485/RS-422 ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icssn75175dfactory-2.0.0extractor-text

Verified SN75175D

by Ray · last 8 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

8 Nov 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN75175D · SOIC-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 22-page datasheet
  • •distributor (warn): no ['digikey'] number
  • ✓family: SOIC-16_3.9x9.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ndek3v1w/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn75175d.kicad_sym✓ sn75175d.kicad_mod✓ sn75175d.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
sn75175d / README.md
History Download
Ray Publish 0.1.0 3399f1e 1d ago

SN75175D

Texas Instruments · RS-485/RS-422 ICs · SOIC-16

SN75175D from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1B input Inverting differential line input of receiver 1, with ±12 V common-mode range and ±200 mV sensitivity.
2 1A input Noninverting differential line input of receiver 1, with ±12 V common-mode range and ±200 mV sensitivity.
3 1Y tri_state 3-state output of receiver 1, high impedance when 1,2EN is low.
4 1,2EN input Active-high enable for receivers 1 and 2, with VIH min 2 V and VIL max 0.8 V.
5 2Y tri_state 3-state output of receiver 2, high impedance when 1,2EN is low.
6 2A input Noninverting differential line input of receiver 2, with ±12 V common-mode range and ±200 mV sensitivity.
7 2B input Inverting differential line input of receiver 2, with ±12 V common-mode range and ±200 mV sensitivity.
8 GND power_in Ground terminal; all voltages except differential input voltage are referenced to it.
9 3B input Inverting differential line input of receiver 3, with ±12 V common-mode range and ±200 mV sensitivity.
10 3A input Noninverting differential line input of receiver 3, with ±12 V common-mode range and ±200 mV sensitivity.
11 3Y tri_state 3-state output of receiver 3, high impedance when 3,4EN is low.
12 3,4EN input Active-high enable for receivers 3 and 4, with VIH min 2 V and VIL max 0.8 V.
13 4Y tri_state 3-state output of receiver 4, high impedance when 3,4EN is low.
14 4A input Noninverting differential line input of receiver 4, with ±12 V common-mode range and ±200 mV sensitivity.
15 4B input Inverting differential line input of receiver 4, with ±12 V common-mode range and ±200 mV sensitivity.
16 VCC power_in Single 5 V supply, recommended 4.75 V to 5.25 V, absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Interface ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 3
Common-mode input voltage VIC -12 12 V 3
Differential input voltage VID -12 12 V 3
High-level enable-input voltage VIH 2 V 3
Low-level enable-input voltage VIL 0.8 V 3
High-level output current IOH -400 µA 3
Low-level output current IOL 16 mA 3
Operating free-air temperature TA 0 70 °C SN75175 3
Supply voltage VCC 7 V see Note 1 3
Input voltage (A or B inputs) VI -25 25 V A or B inputs 3
Differential input voltage VID -25 25 V see Note 2 3
Enable input voltage VI, EN 7 V 3
Low-level output current IOL 50 mA 3
Operating free-air temperature range TA 0 70 °C SN75175 3
Storage temperature range Tstg -65 150 °C 3
Lead temperature 260 °C 1,6 mm (1/16 inch) from case for 10 seconds 3
Power rating, D package 950 mW TA ≤ 25°C 3
Derating factor, D package 7.6 mW/°C D package, dissipation rating table 3
Positive-going input threshold voltage VIT+ 0.2 V VO = 2.7 V, IO = −0.4 mA 4
Negative-going input threshold voltage VIT− -0.2 V VO = 0.5 V, IO = 16 mA 4
Hysteresis voltage Vhys 50 mV See Figure 4 4
Enable-input clamp voltage VIK -1.5 V II = −18 mA 4
High-level output voltage VOH 2.7 V VID = 200 mV, IOH = −400 µA, See Figure 1 4
Low-level output voltage VOL 0.45 V VID = 200 mV, IOL = 8 mA, See Figure 1 4
Low-level output voltage VOL 0.5 V VID = −200 mV, IOL = 16 mA, See Figure 1 4
High-impedance-state output current IOZ -20 20 µA VO = 0.4 V to 2.4 V 4
Line input current II 1 mA VI = 12 V, other input at 0 V, See Note 3 4
Line input current II -0.8 mA VI = −7 V, other input at 0 V, See Note 3 4
High-level enable-input current IIH 20 µA VIH = 2.7 V 4
Low-level enable-input current IIL -100 µA VIL = 0.4 V 4
Input resistance ri 12 kΩ 4
Short-circuit output current IOS -15 -85 mA Not more than one output shorted at a time; duration not to exceed one second 4
Supply current ICC 70 mA Outputs disabled 4
Propagation delay time, low- to high-level output tPLH 22 35 ns VCC = 5 V, CL = 15 pF, TA = 25°C, See Figure 2 4
Propagation delay time, high- to low-level output tPHL 25 35 ns VCC = 5 V, CL = 15 pF, TA = 25°C, See Figure 2 4
Output enable time to high level tPZH 13 30 ns VCC = 5 V, CL = 15 pF, TA = 25°C, See Figure 3 4
Output enable time to low level tPZL 19 30 ns VCC = 5 V, CL = 15 pF, TA = 25°C, See Figure 3 4
Output disable time from high level tPHZ 26 35 ns VCC = 5 V, CL = 15 pF, TA = 25°C, See Figure 3 4
Output disable time from low level tPLZ 25 35 ns VCC = 5 V, CL = 15 pF, TA = 25°C, See Figure 3 4

CAD (KiCad official)

  • Symbol: SN75175D
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn75175d-etched.step / sn75175d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn75175d.step / sn75175d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 a4bae40747e7fdb3, retrieved 2026-11-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF