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SN75160BDWR

Public Made by Adom

by adom

Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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SN75160BDWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20

SN75160BDWR from Texas Instruments, in a SOIC-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TE input Talk enable: when high, the bus-port drivers operate in passive-pullup or 3-state mode per PE; when low, the bus ports are placed in the high-impedance state.
2 B1 bidirectional GPIB bus I/O port 1; the driver can sink up to 48 mA (IOL, bus ports) and source -5.2 mA (IOH with pullups active).
3 B2 bidirectional GPIB bus I/O port 2; the driver can sink up to 48 mA (IOL, bus ports) and source -5.2 mA (IOH with pullups active).
4 B3 bidirectional GPIB bus I/O port 3; the driver can sink up to 48 mA (IOL, bus ports) and source -5.2 mA (IOH with pullups active).
5 B4 bidirectional GPIB bus I/O port 4; the driver can sink up to 48 mA (IOL, bus ports) and source -5.2 mA (IOH with pullups active).
6 B5 bidirectional GPIB bus I/O port 5; the driver can sink up to 48 mA (IOL, bus ports) and source -5.2 mA (IOH with pullups active).
7 B6 bidirectional GPIB bus I/O port 6; the driver can sink up to 48 mA (IOL, bus ports) and source -5.2 mA (IOH with pullups active).
8 B7 bidirectional GPIB bus I/O port 7; the driver can sink up to 48 mA (IOL, bus ports) and source -5.2 mA (IOH with pullups active).
9 B8 bidirectional GPIB bus I/O port 8; the driver can sink up to 48 mA (IOL, bus ports) and source -5.2 mA (IOH with pullups active).
10 GND power_in Network ground; all voltage values in the datasheet are referenced to this terminal.
11 PE input Pullup enable: with TE high, bus ports act as passive-pullup outputs when PE is low and as 3-state outputs when PE is high.
12 D8 input Terminal-side driver data input for channel 8; logic input with VIH minimum 2 V and VIL maximum 0.8 V.
13 D7 input Terminal-side driver data input for channel 7; logic input with VIH minimum 2 V and VIL maximum 0.8 V.
14 D6 input Terminal-side driver data input for channel 6; logic input with VIH minimum 2 V and VIL maximum 0.8 V.
15 D5 input Terminal-side driver data input for channel 5; logic input with VIH minimum 2 V and VIL maximum 0.8 V.
16 D4 input Terminal-side driver data input for channel 4; logic input with VIH minimum 2 V and VIL maximum 0.8 V.
17 D3 input Terminal-side driver data input for channel 3; logic input with VIH minimum 2 V and VIL maximum 0.8 V.
18 D2 input Terminal-side driver data input for channel 2; logic input with VIH minimum 2 V and VIL maximum 0.8 V.
19 D1 input Terminal-side driver data input for channel 1; logic input with VIH minimum 2 V and VIL maximum 0.8 V.
20 VCC power_in Supply voltage, recommended 4.75 V to 5.25 V (5 V nominal); absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN75160BDWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20 (KiCad packages3D, STEP)
  • 3D model files: sn75160bdwr-etched.step / sn75160bdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn75160bdwr.step / sn75160bdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 6f2c9663f6c8f5ef, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF