component
SN75119P
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 1d ago |
| viewers | 1d ago |
| package.json | 1d ago |
| page.json | 1d ago |
| README.md | 1d ago |
| sn75119p-etched.glb | 1d ago |
| sn75119p-etched.step | 1d ago |
| sn75119p-hero.glb | 1d ago |
| sn75119p-hero.overlay.json | 1d ago |
| sn75119p.glb | 1d ago |
| sn75119p.kicad_mod | 1d ago |
| sn75119p.kicad_sym | 1d ago |
| sn75119p.lbr | 1d ago |
| sn75119p.step | 1d ago |
SN75119P
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · DIP-8
SN75119P from Texas Instruments, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DI | input | Driver data input, TTL-compatible; absolute maximum input voltage is 5.5 V. |
| 2 | B | bidirectional | Bus terminal B, the driver output and receiver input; receiver inputs are limited to 0 to 6 V and neither receiver input may be taken negative with respect to GND. |
| 3 | A | bidirectional | Bus terminal A, the driver output and receiver reference input; receiver inputs are limited to 0 to 6 V and neither receiver input may be taken negative with respect to GND. |
| 4 | GND | power_in | Network ground terminal to which all device voltages are referenced. |
| 5 | RE | input | Active-low receiver output enable; when high, the receiver output RY is placed in the high-impedance state. |
| 6 | RY | tri_state | TTL-compatible receiver output with 3-state control via RE; it is high impedance when RE is high. |
| 7 | DE | input | Active-high driver enable; when low the driver output is high impedance, with VIH min 2 V and VIL max 0.8 V. |
| 8 | VCC | power_in | Single 5 V supply, recommended 4.5 V to 5.5 V (5 V nominal) with an absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DIP-8 |
| Category | Logic |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SN75119P - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
sn75119p-etched.step/sn75119p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn75119p.step/sn75119p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
d7b0f3d8f611eacb, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).