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SN75113N
Public Made by Adomby adom
Texas Instruments Interface - Specialized, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdownSN75113N
Texas Instruments · Interface - Specialized · PDIP-16
SN75113N from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1ZP | output | Active pullup terminal for the NAND output of driver 1, paired with sink output 1ZS. |
| 2 | 1ZS | output | NAND sink output of driver 1, which goes high-impedance when its output control is low. |
| 3 | 1YS | output | AND sink output of driver 1, adjacent to active pullup 1YP. |
| 4 | 1YP | output | Active pullup terminal for the AND output of driver 1, paired with sink output 1YS. |
| 5 | 1A | input | Data input A of driver 1, TTL compatible with VIH minimum 2 V and VIL maximum 0.8 V. |
| 6 | 1B | input | Data input B of driver 1 only, TTL compatible with VIH minimum 2 V and VIL maximum 0.8 V. |
| 7 | 1C | input | Output control input for driver 1; a low level places its outputs in the high-impedance state. |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | CC | input | Common output control input for both drivers; a low level places the outputs in the high-impedance state. |
| 10 | 2C | input | Output control input for driver 2; a low level places its outputs in the high-impedance state. |
| 11 | 2A | input | Data input A of driver 2, TTL compatible with VIH minimum 2 V and VIL maximum 0.8 V. |
| 12 | 2YP | output | Active pullup terminal for the AND output of driver 2, paired with sink output 2YS. |
| 13 | 2YS | output | AND sink output of driver 2, adjacent to active pullup 2YP. |
| 14 | 2ZS | output | NAND sink output of driver 2, adjacent to active pullup 2ZP. |
| 15 | 2ZP | output | Active pullup terminal for the NAND output of driver 2, paired with sink output 2ZS. |
| 16 | VCC | power_in | Single 5 V supply; recommended 4.75 V to 5.25 V for SN75113 (4.5 V to 5.5 V for SN55113). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-16 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.75 | 5 | 5.25 | V | 4 | |
| High-level input voltage | VIH | 2 | V | 4 | |||
| Low-level input voltage | VIL | 0.8 | V | 4 | |||
| High-level output current | IOH | -40 | mA | 4 | |||
| Low-level output current | IOL | 40 | mA | 4 | |||
| Operating free-air temperature | TA | 0 | 70 | °C | SN75113 | 4 | |
| Supply voltage | VCC | 7 | V | see Note 1 | 3 | ||
| Input voltage | VI | 5.5 | V | 3 | |||
| Off-state voltage applied to open-collector outputs | 12 | V | 3 | ||||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Lead temperature, N package | 260 | °C | 1,6 mm (1/16 inch) from case for 10 seconds | 3 | |||
| Continuous total power dissipation, N package | 1150 | mW | TA ≤ 25°C | 3 | |||
| Derating factor above TA = 25°C, N package | 9.2 | mW/°C | above TA = 25°C | 3 | |||
| Power rating, N package | 736 | mW | TA = 70°C | 3 | |||
| Input clamp voltage | VIK | -0.9 | -1.5 | V | VCC = MIN, II = -12 mA | 4 | |
| High-level output voltage | VOH | 2.4 | 3.4 | V | VCC = MIN, VIH = 2 V, IOH = -10 mA | 4 | |
| High-level output voltage | VOH | 2 | 3 | V | VCC = MIN, VIL = 0.8 V, VIH = 2 V, IOH = -40 mA | 4 | |
| Low-level output voltage | VOL | 0.23 | 0.4 | V | VCC = MIN, IOL = 40 mA, VIH = 2 V, VIL = 0.8 V | 4 | |
| Output clamp voltage | VOK | -1.1 | -1.5 | V | VCC = MAX, IO = -40 mA | 4 | |
| Off-state open-collector output current | IO(off) | 1 | 10 | μA | VCC = MAX, VOH = 5.25 V, TA = 25°C | 4 | |
| Off-state open-collector output current | IO(off) | 20 | μA | VCC = MAX, VOH = 5.25 V, TA = 70°C | 4 | ||
| Off-state (high-impedance-state) output current | IOZ | -10 | 10 | μA | TA = 25°C, VO = 0 to VCC, VCC = MAX, output controls at 0.8 V | 4 | |
| Off-state (high-impedance-state) output current | IOZ | -20 | μA | VCC = MAX, VO = 0 | 4 | ||
| Off-state (high-impedance-state) output current | IOZ | -20 | 20 | μA | VCC = MAX, VO = 0.4 V, output controls at 0.8 V | 4 | |
| Off-state (high-impedance-state) output current | IOZ | 20 | μA | VCC = MAX, VO = VCC, output controls at 0.8 V | 4 | ||
| Input current at maximum input voltage | II | 1 | mA | VCC = MAX, VI = 5.5 V | 4 | ||
| High-level input current (A, B, C) | IIH | 40 | μA | VCC = MAX, VI = 2.4 V | 4 | ||
| High-level input current (A) | IIH | 80 | μA | VCC = MAX, VI = 2.4 V | 4 | ||
| Low-level input current (A, B, C) | IIL | -1.6 | mA | VCC = MAX, VI = 0.4 V | 4 | ||
| Low-level input current (A) | IIL | -3.2 | mA | VCC = MAX, VI = 0.4 V | 4 | ||
| Short-circuit output current (sourcing) | IOS | 40 | 90 | 120 | mA | VCC = MAX, VO = 0, TA = 25°C | 4 |
| Short-circuit output current (sinking) | IOS | -120 | -90 | -40 | mA | VCC = MAX, VO = 0, TA = 25°C | 4 |
| Supply current (both drivers) | ICC | 47 | 65 | mA | All inputs at 0 V, No load, VCC = MAX | 4 | |
| Supply current (both drivers) | ICC | 65 | 85 | mA | All inputs at 0 V, No load, TA = 25°C, VCC = 7 V | 4 | |
| Propagation delay time, low-to-high level output | tPLH | 13 | 30 | ns | See Figure 1 | 5 | |
| Propagation delay time, high-to-low level output | tPHL | 12 | 30 | ns | See Figure 1 | 5 | |
| Output enable time to high level | tPZH | 7 | 20 | ns | RL = 180 Ω, See Figure 2 | 5 | |
| Output enable time to low level | tPZL | 14 | 40 | ns | RL = 250 Ω, See Figure 3 | 5 | |
| Output disable time from high level | tPHZ | 10 | 30 | ns | RL = 180 Ω, See Figure 2 | 5 | |
| Output disable time from low level | tPLZ | 17 | 35 | ns | RL = 250 Ω, See Figure 3 | 5 |
CAD (KiCad official)
- Symbol:
SN75113N - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: PDIP-16 (KiCad packages3D, STEP)
- 3D model files:
sn75113n-etched.step/sn75113n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn75113n.step/sn75113n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
099592eca5c32f86, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).