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SN74LVTH652DW

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVTH652DW

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-24-300mil

SN74LVTH652DW from Texas Instruments, in a SOIC-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKAB input Clock input for the A-to-B storage flip-flops; data on A or B is stored on each low-to-high transition regardless of the select or enable controls.
2 SAB input Select control for the A-to-B data path; a low input selects real-time data and a high input selects stored data.
3 OEAB input Output-enable control for the A-to-B transceiver path; the data-output functions are enabled or disabled by its level.
4 A1 bidirectional Bus A data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
5 A2 bidirectional Bus A data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
6 A3 bidirectional Bus A data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
7 A4 bidirectional Bus A data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
8 A5 bidirectional Bus A data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
9 A6 bidirectional Bus A data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
10 A7 bidirectional Bus A data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
11 A8 bidirectional Bus A data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
12 GND power_in Device ground reference pin.
13 B8 bidirectional Bus B data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
14 B7 bidirectional Bus B data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
15 B6 bidirectional Bus B data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
16 B5 bidirectional Bus B data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
17 B4 bidirectional Bus B data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
18 B3 bidirectional Bus B data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
19 B2 bidirectional Bus B data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
20 B1 bidirectional Bus B data terminal; the data input has active bus-hold and the outputs are fully specified for Ioff and power-up 3-state hot-insertion operation.
21 OEBA input Output-enable control for the B-to-A transceiver path; the data-output functions are enabled or disabled by its level.
22 SBA input Select control for the B-to-A data path; a low input selects real-time data and a high input selects stored data.
23 CLKBA input Clock input for the B-to-A storage flip-flops; data on A or B is stored on each low-to-high transition regardless of the select or enable controls.
24 VCC power_in Supply voltage; recommended operating range is 2.7 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-24-300mil
Category Logic
Pins 24

CAD (KiCad official)

  • Symbol: SN74LVTH652DW
  • Footprint: Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm
  • 3D model: SOIC-24-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74lvth652dw-etched.step / sn74lvth652dw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvth652dw.step / sn74lvth652dw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 957c4c8157a34388, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF