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SN74LVTH574PWR

Public Made by Adom

by adom

Texas Instruments Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs sn74lvth574pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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README.md Initial commit: component/sn74lvth574pwr · Ray 4d ago
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sn74lvth574pwr-etched.glb sn74lvth574pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74lvth574pwr-etched.step sn74lvth574pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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SN74LVTH574PWR

Texas Instruments · Flip Flops · TSSOP-20

SN74LVTH574PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low output enable control; low enables Q outputs to normal logic levels, high places outputs in high-impedance state.
2 1D input Data input for flip-flop 1, captured on CLK rising edge when OE is low.
3 2D input Data input for flip-flop 2, captured on CLK rising edge when OE is low.
4 3D input Data input for flip-flop 3, captured on CLK rising edge when OE is low.
5 4D input Data input for flip-flop 4, captured on CLK rising edge when OE is low.
6 5D input Data input for flip-flop 5, captured on CLK rising edge when OE is low.
7 6D input Data input for flip-flop 6, captured on CLK rising edge when OE is low.
8 7D input Data input for flip-flop 7, captured on CLK rising edge when OE is low.
9 8D input Data input for flip-flop 8, captured on CLK rising edge when OE is low.
10 GND power_in Ground supply reference.
11 CLK input Positive edge-triggered clock; transfers D inputs to Q outputs on rising edge.
12 8Q tri_state Three-state Q output for flip-flop 8; active when OE is low with IOL = 64 mA and IOH = −32 mA.
13 7Q tri_state Three-state Q output for flip-flop 7; active when OE is low with IOL = 64 mA and IOH = −32 mA.
14 6Q tri_state Three-state Q output for flip-flop 6; active when OE is low with IOL = 64 mA and IOH = −32 mA.
15 5Q tri_state Three-state Q output for flip-flop 5; active when OE is low with IOL = 64 mA and IOH = −32 mA.
16 4Q tri_state Three-state Q output for flip-flop 4; active when OE is low with IOL = 64 mA and IOH = −32 mA.
17 3Q tri_state Three-state Q output for flip-flop 3; active when OE is low with IOL = 64 mA and IOH = −32 mA.
18 2Q tri_state Three-state Q output for flip-flop 2; active when OE is low with IOL = 64 mA and IOH = −32 mA.
19 1Q tri_state Three-state Q output for flip-flop 1; active when OE is low with IOL = 64 mA and IOH = −32 mA.
20 VCC power_in Positive supply voltage; operating range 2.7 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVTH574PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74lvth574pwr-etched.step / sn74lvth574pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvth574pwr.step / sn74lvth574pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 763a6d97f2b695fd, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF