component
SN74LVTH573PWR
Public Made by Adomby adom
Texas Instruments Latches, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSN74LVTH573PWR
Texas Instruments · Latches · TSSOP-20
SN74LVTH573PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output Enable, active low; selects normal output state (low) or high-impedance state (high) |
| 2 | 1D | input | Data input for first transparent latch |
| 3 | 2D | input | Data input for second transparent latch |
| 4 | 3D | input | Data input for third transparent latch |
| 5 | 4D | input | Data input for fourth transparent latch |
| 6 | 5D | input | Data input for fifth transparent latch |
| 7 | 6D | input | Data input for sixth transparent latch |
| 8 | 7D | input | Data input for seventh transparent latch |
| 9 | 8D | input | Data input for eighth transparent latch |
| 10 | GND | power_in | Ground reference (0 V) |
| 11 | LE | input | Latch Enable, active high; when high Q outputs are transparent and follow D inputs, when low Q outputs latch |
| 12 | 8Q | tri_state | Output from eighth latch; driven when OE is low, high-impedance when OE is high |
| 13 | 7Q | tri_state | Output from seventh latch; driven when OE is low, high-impedance when OE is high |
| 14 | 6Q | tri_state | Output from sixth latch; driven when OE is low, high-impedance when OE is high |
| 15 | 5Q | tri_state | Output from fifth latch; driven when OE is low, high-impedance when OE is high |
| 16 | 4Q | tri_state | Output from fourth latch; driven when OE is low, high-impedance when OE is high |
| 17 | 3Q | tri_state | Output from third latch; driven when OE is low, high-impedance when OE is high |
| 18 | 2Q | tri_state | Output from second latch; driven when OE is low, high-impedance when OE is high |
| 19 | 1Q | tri_state | Output from first latch; driven when OE is low, high-impedance when OE is high |
| 20 | VCC | power_in | Power supply, 2.7 V to 3.6 V nominal |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LVTH573PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74lvth573pwr-etched.step/sn74lvth573pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvth573pwr.step/sn74lvth573pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
3cfdfbaf569799e7, retrieved 2026-10-01, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).