SN74LVTH573DWR

{
  "slug": "sn74lvth573dwr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Latches, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "sn74lvth573dwr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74lvth573dwr.kicad_sym",
    "sn74lvth573dwr.kicad_mod",
    "sn74lvth573dwr.glb",
    "sn74lvth573dwr.step",
    "sn74lvth573dwr.lbr",
    "docs/hero.png",
    "docs/sn74lvth573dwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn74lvth573dwr-hero.glb",
    "sn74lvth573dwr-hero.overlay.json"
  ],
  "component": {
    "mpn": "SN74LVTH573DWR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-20-300mil",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Latches",
    "datasheet": "https://www.ti.com/cn/lit/gpn/sn54lvth573",
    "parts": {
      "symbol": "sn74lvth573dwr.kicad_sym",
      "footprint": "sn74lvth573dwr.kicad_mod",
      "model_3d": "sn74lvth573dwr-hero.glb",
      "model_3d_plain": "sn74lvth573dwr.glb",
      "model_3d_step": "sn74lvth573dwr-etched.step",
      "model_3d_step_plain": "sn74lvth573dwr.step",
      "lbr": "sn74lvth573dwr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2870471",
      "digikey": "296-14935-2-ND",
      "mouser": "595-SN74LVTH573DWR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T21:13:33Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-14935-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-SN74LVTH573DWR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "OE",
        "type": "input",
        "description": "Buffered active-low output enable: when high it forces the eight Q outputs into the high-impedance state without affecting the latch contents, and it should be tied to VCC through a pullup resistor to keep the outputs high-Z during power up and power down."
      },
      {
        "number": "2",
        "name": "1D",
        "type": "input",
        "description": "Data input to transparent latch 1; bus-hold circuitry holds a floating input at a valid logic level, and the recommended input voltage is up to 5.5 V."
      },
      {
        "number": "3",
        "name": "2D",
        "type": "input",
        "description": "Data input to transparent latch 2; bus-hold circuitry holds a floating input at a valid logic level, and the recommended input voltage is up to 5.5 V."
      },
      {
        "number": "4",
        "name": "3D",
        "type": "input",
        "description": "Data input to transparent latch 3; bus-hold circuitry holds a floating input at a valid logic level, and the recommended input voltage is up to 5.5 V."
      },
      {
        "number": "5",
        "name": "4D",
        "type": "input",
        "description": "Data input to transparent latch 4; bus-hold circuitry holds a floating input at a valid logic level, and the recommended input voltage is up to 5.5 V."
      },
      {
        "number": "6",
        "name": "5D",
        "type": "input",
        "description": "Data input to transparent latch 5; bus-hold circuitry holds a floating input at a valid logic level, and the recommended input voltage is up to 5.5 V."
      },
      {
        "number": "7",
        "name": "6D",
        "type": "input",
        "description": "Data input to transparent latch 6; bus-hold circuitry holds a floating input at a valid logic level, and the recommended input voltage is up to 5.5 V."
      },
      {
        "number": "8",
        "name": "7D",
        "type": "input",
        "description": "Data input to transparent latch 7; bus-hold circuitry holds a floating input at a valid logic level, and the recommended input voltage is up to 5.5 V."
      },
      {
        "number": "9",
        "name": "8D",
        "type": "input",
        "description": "Data input to transparent latch 8; bus-hold circuitry holds a floating input at a valid logic level, and the recommended input voltage is up to 5.5 V."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device."
      },
      {
        "number": "11",
        "name": "LE",
        "type": "input",
        "description": "Latch enable: while high the Q outputs follow the D inputs, and when taken low the Q outputs latch the data present at D; LE high pulse duration must be at least 3 ns, with data setup of 0.7 ns (3.3 V) and hold of 1.5 ns before and after LE falls."
      },
      {
        "number": "12",
        "name": "8Q",
        "type": "tri_state",
        "description": "Three-state output of latch 8; drives up to IOL 64 mA low and IOH −32 mA high (SN74LVTH573 recommended levels) and goes high-impedance when OE is high."
      },
      {
        "number": "13",
        "name": "7Q",
        "type": "tri_state",
        "description": "Three-state output of latch 7; drives up to IOL 64 mA low and IOH −32 mA high (SN74LVTH573 recommended levels) and goes high-impedance when OE is high."
      },
      {
        "number": "14",
        "name": "6Q",
        "type": "tri_state",
        "description": "Three-state output of latch 6; drives up to IOL 64 mA low and IOH −32 mA high (SN74LVTH573 recommended levels) and goes high-impedance when OE is high."
      },
      {
        "number": "15",
        "name": "5Q",
        "type": "tri_state",
        "description": "Three-state output of latch 5; drives up to IOL 64 mA low and IOH −32 mA high (SN74LVTH573 recommended levels) and goes high-impedance when OE is high."
      },
      {
        "number": "16",
        "name": "4Q",
        "type": "tri_state",
        "description": "Three-state output of latch 4; drives up to IOL 64 mA low and IOH −32 mA high (SN74LVTH573 recommended levels) and goes high-impedance when OE is high."
      },
      {
        "number": "17",
        "name": "3Q",
        "type": "tri_state",
        "description": "Three-state output of latch 3; drives up to IOL 64 mA low and IOH −32 mA high (SN74LVTH573 recommended levels) and goes high-impedance when OE is high."
      },
      {
        "number": "18",
        "name": "2Q",
        "type": "tri_state",
        "description": "Three-state output of latch 2; drives up to IOL 64 mA low and IOH −32 mA high (SN74LVTH573 recommended levels) and goes high-impedance when OE is high."
      },
      {
        "number": "19",
        "name": "1Q",
        "type": "tri_state",
        "description": "Three-state output of latch 1; drives up to IOL 64 mA low and IOH −32 mA high (SN74LVTH573 recommended levels) and goes high-impedance when OE is high."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage, specified from 2.7 V to 3.6 V for the SN74LVTH573."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The DW pin numbers are not given as a printed table. They were derived from the top-view figure on p; The datasheet's Q-output descriptions use the SN74 recommended IOH/IOL limits, which are given for a",
          "7/20 pins cited to the wrong page (name found elsewhere): ['11:LE@p6', '12:8Q@p4', '13:7Q@p4', '14:6Q@p4']"
        ],
        "pages_sent": 28,
        "cost_usd": 0.102,
        "at": "2026-10-08T21:12:44"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/sn54lvth573",
        "pages": 28,
        "sha256": "3cfdfbaf569799e7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
    },
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          10.3,
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        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "59a10b341e6972b31d81802a048060326da627d8b92dcf4263064f4f62ec808e",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74lvth573dwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "21d9bfb6170b9c5e594301ca5ea51f3046b73170ba0b79860928333297295aa8",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}