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SN74LVTH541PWR

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVTH541PWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74LVTH541PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low output enable input; all outputs are driven to high-impedance state when this input is high
2 A1 input Data input to buffer channel 1 with internal bus-hold circuitry; supports input voltage up to 5.5 V
3 A2 input Data input to buffer channel 2 with internal bus-hold circuitry; supports input voltage up to 5.5 V
4 A3 input Data input to buffer channel 3 with internal bus-hold circuitry; supports input voltage up to 5.5 V
5 A4 input Data input to buffer channel 4 with internal bus-hold circuitry; supports input voltage up to 5.5 V
6 A5 input Data input to buffer channel 5 with internal bus-hold circuitry; supports input voltage up to 5.5 V
7 A6 input Data input to buffer channel 6 with internal bus-hold circuitry; supports input voltage up to 5.5 V
8 A7 input Data input to buffer channel 7 with internal bus-hold circuitry; supports input voltage up to 5.5 V
9 A8 input Data input to buffer channel 8 with internal bus-hold circuitry; supports input voltage up to 5.5 V
10 GND power_in Ground reference, 0 V
11 Y8 tri_state Tri-state data output from buffer channel 8; high-impedance when output-enable inputs are high, otherwise drives bus line
12 Y7 tri_state Tri-state data output from buffer channel 7; high-impedance when output-enable inputs are high, otherwise drives bus line
13 Y6 tri_state Tri-state data output from buffer channel 6; high-impedance when output-enable inputs are high, otherwise drives bus line
14 Y5 tri_state Tri-state data output from buffer channel 5; high-impedance when output-enable inputs are high, otherwise drives bus line
15 Y4 tri_state Tri-state data output from buffer channel 4; high-impedance when output-enable inputs are high, otherwise drives bus line
16 Y3 tri_state Tri-state data output from buffer channel 3; high-impedance when output-enable inputs are high, otherwise drives bus line
17 Y2 tri_state Tri-state data output from buffer channel 2; high-impedance when output-enable inputs are high, otherwise drives bus line
18 Y1 tri_state Tri-state data output from buffer channel 1; high-impedance when output-enable inputs are high, otherwise drives bus line
19 OE2 input Active-low output enable input; all outputs are driven to high-impedance state when this input is high
20 VCC power_in Positive supply voltage; rated 2.7 V to 3.6 V for recommended operation

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVTH541PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74lvth541pwr-etched.step / sn74lvth541pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvth541pwr.step / sn74lvth541pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 99e8a083b9294a0b, retrieved 2026-09-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF