component
SN74LVTH541DWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
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| viewers | 9h ago |
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| README.md | 9h ago |
| sn74lvth541dwr-etched.glb | 9h ago |
| sn74lvth541dwr-etched.step | 9h ago |
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| sn74lvth541dwr-hero.overlay.json | 9h ago |
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| sn74lvth541dwr.step | 9h ago |
SN74LVTH541DWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil
SN74LVTH541DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-low output enable control input; when high, all outputs enter high-impedance state |
| 2 | A1 | input | Data input for octal buffer channel 1 with active bus-hold circuitry |
| 3 | A2 | input | Data input for octal buffer channel 2 with active bus-hold circuitry |
| 4 | A3 | input | Data input for octal buffer channel 3 with active bus-hold circuitry |
| 5 | A4 | input | Data input for octal buffer channel 4 with active bus-hold circuitry |
| 6 | A5 | input | Data input for octal buffer channel 5 with active bus-hold circuitry |
| 7 | A6 | input | Data input for octal buffer channel 6 with active bus-hold circuitry |
| 8 | A7 | input | Data input for octal buffer channel 7 with active bus-hold circuitry |
| 9 | A8 | input | Data input for octal buffer channel 8 with active bus-hold circuitry |
| 10 | GND | power_in | Ground connection |
| 11 | Y8 | tri_state | Tri-state buffered output for channel 8; high-impedance when OE1 or OE2 is high |
| 12 | Y7 | tri_state | Tri-state buffered output for channel 7; high-impedance when OE1 or OE2 is high |
| 13 | Y6 | tri_state | Tri-state buffered output for channel 6; high-impedance when OE1 or OE2 is high |
| 14 | Y5 | tri_state | Tri-state buffered output for channel 5; high-impedance when OE1 or OE2 is high |
| 15 | Y4 | tri_state | Tri-state buffered output for channel 4; high-impedance when OE1 or OE2 is high |
| 16 | Y3 | tri_state | Tri-state buffered output for channel 3; high-impedance when OE1 or OE2 is high |
| 17 | Y2 | tri_state | Tri-state buffered output for channel 2; high-impedance when OE1 or OE2 is high |
| 18 | Y1 | tri_state | Tri-state buffered output for channel 1; high-impedance when OE1 or OE2 is high |
| 19 | OE2 | input | Active-low output enable control input; when high, all outputs enter high-impedance state |
| 20 | VCC | power_in | Supply voltage; recommended operating range 2.7 V to 3.6 V |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LVTH541DWR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74lvth541dwr-etched.step/sn74lvth541dwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvth541dwr.step/sn74lvth541dwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
99e8a083b9294a0b, retrieved 2026-10-06, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).