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SN74LVTH373PWR

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Texas Instruments Latches, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74LVTH373PWR

Texas Instruments · Latches · TSSOP-20

SN74LVTH373PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low buffered output-enable; when high, places all eight Q outputs in the high-impedance state; accepts input voltages up to 7 V for 5-V mixed-mode operation.
2 1Q tri_state Latch output for channel 1; follows 1D while LE is high, latches on LE falling edge; driven high-impedance when OE is high; IOH = −32 mA, IOL = 64 mA at VCC = 3 V.
3 1D input Data input for channel 1; includes bus-hold circuitry eliminating external pullup/pulldown; VIH ≥ 2 V, VIL ≤ 0.8 V, accepts up to 7 V.
4 2D input Data input for channel 2; includes bus-hold circuitry; VIH ≥ 2 V, VIL ≤ 0.8 V, accepts up to 7 V.
5 2Q tri_state Latch output for channel 2; follows 2D while LE is high, latches on LE falling edge; driven high-impedance when OE is high; IOH = −32 mA, IOL = 64 mA at VCC = 3 V.
6 3Q tri_state Latch output for channel 3; follows 3D while LE is high, latches on LE falling edge; driven high-impedance when OE is high; IOH = −32 mA, IOL = 64 mA at VCC = 3 V.
7 3D input Data input for channel 3; includes bus-hold circuitry; VIH ≥ 2 V, VIL ≤ 0.8 V, accepts up to 7 V.
8 4D input Data input for channel 4; includes bus-hold circuitry; VIH ≥ 2 V, VIL ≤ 0.8 V, accepts up to 7 V.
9 4Q tri_state Latch output for channel 4; follows 4D while LE is high, latches on LE falling edge; driven high-impedance when OE is high; IOH = −32 mA, IOL = 64 mA at VCC = 3 V.
10 GND power_in Ground reference (0 V) for the 3.3 V supply.
11 LE input Latch-enable control input; while high, Q outputs transparently follow D inputs; on falling edge, Q outputs latch the current D logic levels; minimum pulse width 3 ns at VCC = 3.3 V.
12 5Q tri_state Latch output for channel 5; follows 5D while LE is high, latches on LE falling edge; driven high-impedance when OE is high; IOH = −32 mA, IOL = 64 mA at VCC = 3 V.
13 5D input Data input for channel 5; includes bus-hold circuitry; VIH ≥ 2 V, VIL ≤ 0.8 V, accepts up to 7 V.
14 6D input Data input for channel 6; includes bus-hold circuitry; VIH ≥ 2 V, VIL ≤ 0.8 V, accepts up to 7 V.
15 6Q tri_state Latch output for channel 6; follows 6D while LE is high, latches on LE falling edge; driven high-impedance when OE is high; IOH = −32 mA, IOL = 64 mA at VCC = 3 V.
16 7Q tri_state Latch output for channel 7; follows 7D while LE is high, latches on LE falling edge; driven high-impedance when OE is high; IOH = −32 mA, IOL = 64 mA at VCC = 3 V.
17 7D input Data input for channel 7; includes bus-hold circuitry; VIH ≥ 2 V, VIL ≤ 0.8 V, accepts up to 7 V.
18 8D input Data input for channel 8; includes bus-hold circuitry; VIH ≥ 2 V, VIL ≤ 0.8 V, accepts up to 7 V.
19 8Q tri_state Latch output for channel 8; follows 8D while LE is high, latches on LE falling edge; driven high-impedance when OE is high; IOH = −32 mA, IOL = 64 mA at VCC = 3 V.
20 VCC power_in Positive supply voltage; operating range 2.7 V to 3.6 V; supports 5 V mixed-mode signal operation on inputs and outputs.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVTH373PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74lvth373pwr-etched.step / sn74lvth373pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvth373pwr.step / sn74lvth373pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 761397af85c8dde1, retrieved 2026-09-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF