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SN74LVTH245AMDBREP

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVTH245AMDBREP

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-20-208mil

SN74LVTH245AMDBREP from Texas Instruments, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR input Direction-control input: with OE low, DIR high transfers A data to the B bus and DIR low transfers B data to the A bus (function table, page 2).
2 A1 bidirectional A-bus port 1 of the 3-state octal transceiver; it drives the B bus when OE is low and DIR is high, and receives from the B bus when DIR is low.
3 A2 bidirectional A-bus port 2 of the 3-state octal transceiver; it drives the B bus when OE is low and DIR is high, and receives from the B bus when DIR is low.
4 A3 bidirectional A-bus port 3 of the 3-state octal transceiver; it drives the B bus when OE is low and DIR is high, and receives from the B bus when DIR is low.
5 A4 bidirectional A-bus port 4 of the 3-state octal transceiver; it drives the B bus when OE is low and DIR is high, and receives from the B bus when DIR is low.
6 A5 bidirectional A-bus port 5 of the 3-state octal transceiver; it drives the B bus when OE is low and DIR is high, and receives from the B bus when DIR is low.
7 A6 bidirectional A-bus port 6 of the 3-state octal transceiver; it drives the B bus when OE is low and DIR is high, and receives from the B bus when DIR is low.
8 A7 bidirectional A-bus port 7 of the 3-state octal transceiver; it drives the B bus when OE is low and DIR is high, and receives from the B bus when DIR is low.
9 A8 bidirectional A-bus port 8 of the 3-state octal transceiver; it drives the B bus when OE is low and DIR is high, and receives from the B bus when DIR is low.
10 GND power_in Ground reference for the device.
11 B8 bidirectional B-bus port 8 of the 3-state octal transceiver; it receives from the A bus when OE is low and DIR is high, and drives the A bus when DIR is low.
12 B7 bidirectional B-bus port 7 of the 3-state octal transceiver; it receives from the A bus when OE is low and DIR is high, and drives the A bus when DIR is low.
13 B6 bidirectional B-bus port 6 of the 3-state octal transceiver; it receives from the A bus when OE is low and DIR is high, and drives the A bus when DIR is low.
14 B5 bidirectional B-bus port 5 of the 3-state octal transceiver; it receives from the A bus when OE is low and DIR is high, and drives the A bus when DIR is low.
15 B4 bidirectional B-bus port 4 of the 3-state octal transceiver; it receives from the A bus when OE is low and DIR is high, and drives the A bus when DIR is low.
16 B3 bidirectional B-bus port 3 of the 3-state octal transceiver; it receives from the A bus when OE is low and DIR is high, and drives the A bus when DIR is low.
17 B2 bidirectional B-bus port 2 of the 3-state octal transceiver; it receives from the A bus when OE is low and DIR is high, and drives the A bus when DIR is low.
18 B1 bidirectional B-bus port 1 of the 3-state octal transceiver; it receives from the A bus when OE is low and DIR is high, and drives the A bus when DIR is low.
19 OE input Output-enable input: when high it isolates the buses, and it should be tied to VCC through a pullup resistor so the outputs stay high-impedance during power up and power down.
20 VCC power_in Supply voltage, 2.7 V to 3.6 V recommended operating range, with all unused control inputs held at VCC or GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-20-208mil
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range (absolute maximum) VCC -0.5 4.6 V 3
Input voltage range VI -0.5 7 V 3
Voltage applied to any output in the high-impedance or power-off state VO -0.5 7 V 3
Voltage applied to any output in the high state VO -0.5 V 3
Current into any output in the low state IO 128 mA 3
Current into any output in the high state IO 64 mA Footnote 3: flows only when output is high and VO > VCC 3
Input clamp current IIK -50 mA VI < 0 3
Output clamp current IOK -50 mA VO < 0 3
Package thermal impedance, DB package θJA 69.5 °C/W DB package; calculated per JESD 51-7 (footnote 4) 3
Storage temperature range Tstg -65 150 °C 3
Supply voltage VCC 2.7 3.6 V 3
High-level input voltage VIH 2 V 3
Low-level input voltage VIL 0.8 V 3
Input voltage VI 5.5 V 3
High-level output current IOH -32 mA 3
Low-level output current IOL 64 mA 3
Input transition rise or fall rate Δt/Δv 10 ns/V Outputs enabled 3
Power-up ramp rate Δt/ΔVCC 200 µs/V 3
Operating free-air temperature (M temp) TA -55 125 °C M temp 3
Clamp voltage VIK -1.2 V VCC = 2.7 V, II = -18 mA 4
High-level output voltage VOH 2.4 V VCC = 2.7 V, IOH = -8 mA 4
Low-level output voltage VOL 0.2 V VCC = 2.7 V, IOL = 100 µA 4
Low-level output voltage VOL 0.4 V VCC = 2.7 V, IOL = 16 mA 4
Low-level output voltage VOL 0.5 V VCC = 2.7 V, IOL = 24 mA 4
Control inputs input current II -1 1 µA VCC = 3.6 V, VI = VCC or GND 4
Control inputs input current II 10 µA VCC = 0 or 3.6 V, VI = 5.5 V 4
A or B port input current II 20 µA VI = 5.5 V 4
A or B port input current II 1 µA VCC = 3.6 V, VI = VCC 4
A or B port input current II -5 µA VI = 0 4
Power-off input/output current Ioff -100 100 µA VCC = 0, VI or VO = 0 V to 4.5 V 4
Bus hold sustain current, A or B port II(hold) 75 µA VCC = 3 V, VI = 0.8 V 4
Bus hold sustain current, A or B port II(hold) -75 µA VCC = 3 V, VI = 2 V 4
Bus hold dynamic current, A or B port II(hold) -750 µA VCC = 3.6 V, VI = 0 V to 3.6 V; footnote 3: bus-hold maximum dynamic current 4
Off-state output current in power-up 3-state IOZPU -100 100 µA VCC = 0 to 1.5 V, VO = 0.5 V to 3 V, OE = don't care 4
Off-state output current in power-down 3-state IOZPD -100 100 µA VCC = 1.5 V to 0, VO = 0.5 V to 3 V, OE = don't care 4
Supply current, outputs high ICC 0.19 mA VCC = 3.6 V, IO = 0, VI = VCC or GND 4
Supply current, outputs low ICC 5 mA VCC = 3.6 V, IO = 0, VI = VCC or GND 4
Supply current, outputs disabled ICC 0.19 mA VCC = 3.6 V, IO = 0, VI = VCC or GND 4
Additional supply current per input at TTL level ΔICC 0.2 mA VCC = 3 V to 3.6 V, one input at VCC, 0.6 V, other inputs at VCC or GND 4
Input capacitance Ci 4 pF VI = 3 V or 0 4
Output capacitance Co 9 pF VO = 3 V or 0 4

CAD (KiCad official)

  • Symbol: SN74LVTH245AMDBREP
  • Footprint: Package_SO:SSOP-20_5.3x7.2mm_P0.65mm
  • 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
  • 3D model files: sn74lvth245amdbrep-etched.step / sn74lvth245amdbrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvth245amdbrep.step / sn74lvth245amdbrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (17 pp, sha256 6cad5007dfdb917e, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF