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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

SN74LVTH2245PWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74LVTH2245PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DIR	input	Direction-control input; LOW selects B-to-A data transfer, HIGH selects A-to-B data transfer; must not be left floating per Note 4.
2	A1	bidirectional	A-port bidirectional data pin 1; TTL-compatible, accepts up to 5.5 V input; SN74 output rated IOH = −32 mA / IOL = 64 mA at VCC = 3 V; bus-hold circuitry maintains valid level when floating.
3	A2	bidirectional	A-port bidirectional data pin 2; TTL-compatible, accepts up to 5.5 V input; SN74 output rated IOH = −32 mA / IOL = 64 mA at VCC = 3 V; bus-hold circuitry maintains valid level when floating.
4	A3	bidirectional	A-port bidirectional data pin 3; TTL-compatible, accepts up to 5.5 V input; SN74 output rated IOH = −32 mA / IOL = 64 mA at VCC = 3 V; bus-hold circuitry maintains valid level when floating.
5	A4	bidirectional	A-port bidirectional data pin 4; TTL-compatible, accepts up to 5.5 V input; SN74 output rated IOH = −32 mA / IOL = 64 mA at VCC = 3 V; bus-hold circuitry maintains valid level when floating.
6	A5	bidirectional	A-port bidirectional data pin 5; TTL-compatible, accepts up to 5.5 V input; SN74 output rated IOH = −32 mA / IOL = 64 mA at VCC = 3 V; bus-hold circuitry maintains valid level when floating.
7	A6	bidirectional	A-port bidirectional data pin 6; TTL-compatible, accepts up to 5.5 V input; SN74 output rated IOH = −32 mA / IOL = 64 mA at VCC = 3 V; bus-hold circuitry maintains valid level when floating.
8	A7	bidirectional	A-port bidirectional data pin 7; TTL-compatible, accepts up to 5.5 V input; SN74 output rated IOH = −32 mA / IOL = 64 mA at VCC = 3 V; bus-hold circuitry maintains valid level when floating.
9	A8	bidirectional	A-port bidirectional data pin 8; TTL-compatible, accepts up to 5.5 V input; SN74 output rated IOH = −32 mA / IOL = 64 mA at VCC = 3 V; bus-hold circuitry maintains valid level when floating.
10	GND	power_in	Ground reference for all internal logic and I/O; 0 V supply return.
11	B8	bidirectional	B-port bidirectional data pin 8; includes integral 22-Ω series resistor to reduce overshoot/undershoot; output rated IOH = −12 mA / IOL = 12 mA at VCC = 3 V; bus-hold on input; accepts up to 5.5 V.
12	B7	bidirectional	B-port bidirectional data pin 7; includes integral 22-Ω series resistor to reduce overshoot/undershoot; output rated IOH = −12 mA / IOL = 12 mA at VCC = 3 V; bus-hold on input; accepts up to 5.5 V.
13	B6	bidirectional	B-port bidirectional data pin 6; includes integral 22-Ω series resistor to reduce overshoot/undershoot; output rated IOH = −12 mA / IOL = 12 mA at VCC = 3 V; bus-hold on input; accepts up to 5.5 V.
14	B5	bidirectional	B-port bidirectional data pin 5; includes integral 22-Ω series resistor to reduce overshoot/undershoot; output rated IOH = −12 mA / IOL = 12 mA at VCC = 3 V; bus-hold on input; accepts up to 5.5 V.
15	B4	bidirectional	B-port bidirectional data pin 4; includes integral 22-Ω series resistor to reduce overshoot/undershoot; output rated IOH = −12 mA / IOL = 12 mA at VCC = 3 V; bus-hold on input; accepts up to 5.5 V.
16	B3	bidirectional	B-port bidirectional data pin 3; includes integral 22-Ω series resistor to reduce overshoot/undershoot; output rated IOH = −12 mA / IOL = 12 mA at VCC = 3 V; bus-hold on input; accepts up to 5.5 V.
17	B2	bidirectional	B-port bidirectional data pin 2; includes integral 22-Ω series resistor to reduce overshoot/undershoot; output rated IOH = −12 mA / IOL = 12 mA at VCC = 3 V; bus-hold on input; accepts up to 5.5 V.
18	B1	bidirectional	B-port bidirectional data pin 1; includes integral 22-Ω series resistor to reduce overshoot/undershoot; output rated IOH = −12 mA / IOL = 12 mA at VCC = 3 V; bus-hold on input; accepts up to 5.5 V.
19	OE	input	Active-low output-enable; HIGH forces all outputs to high impedance (isolation); Ioff and power-up 3-state circuitry prevent backflow current during hot insertion or power-off; pullup to VCC recommended above 1.5 V during power-up.
20	VCC	power_in	Positive supply voltage; recommended operating range 2.7 V to 3.6 V; absolute maximum −0.5 V to 4.6 V; supports unregulated battery operation down to 2.7 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-20
Category	Logic
Pins	20

CAD (KiCad official)

Symbol: SN74LVTH2245PWR
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model files: sn74lvth2245pwr-etched.step / sn74lvth2245pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvth2245pwr.step / sn74lvth2245pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (22 pp, sha256 bf9e6e31c8384577, retrieved 2026-09-26, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF